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AD5273BRJ10-R2 Folha de dados(PDF) 10 Page - Analog Devices |
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AD5273BRJ10-R2 Folha de dados(HTML) 10 Page - Analog Devices |
10 / 20 page AD5273 –10– SCL SDA t1 t 2 t 3 t 8 t 8 t 9 t 4 t 5 t 9 t 7 t 6 t 10 P P S Figure 1. Interface Timing Diagram Table I. SDA Write Mode Bit Format S 010110 A0 0A T XXXXXXXA XX D5 D4 D3 D2 D1 D0 A P SLAVE ADDRESS BYTE INSTRUCTION BYTE DATA BYTE Table II. SDA Read Mode Bit Format VDD = 5V/DIV VW = 1V/DIV 5V 1V OTP PROGRAMMED AT MS VDD = 5.5V VA = 5.5V RAB = 10k 5 s TPC 25. Power-Up Settling Time, after Fuses Blown CODE – Decimal 10 064 16 32 48 0.01 1.0 0.1 8 24 40 56 VA = VB= OPEN TA = 25 C RAB = 10k RAB = 1k RAB = 50k RAB = 100k TPC 26. IWB_MAX vs. Code SDA BITS DEFINITIONS AND DESCRIPTIONS S = Start Condition P = Stop Condition A = Acknowledge X = Don’t Care T = OTP Programming Bit. Logic 1 programs wiper position permanently. D5, D4, D3, D2, D1, D0 = Data Bits E1, E0 = OTP Validation Bits 0, 0 = Ready to Program 0, 1 = Test Fuse not Blown Successfully. (Check Setup.) 1, 0 = Fatal Error. Retry. 1, 1 = Programmed Successfully. No Further Adjustments Possible. S 010110 A0 A E1 E0 D5 D4 D3 D2 D1 D0 A P SLAVE ADDRESS BYTE DATA BYTE 1 REV. 0 |
Nº de peça semelhante - AD5273BRJ10-R2 |
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Descrição semelhante - AD5273BRJ10-R2 |
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