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MRF89XA Folha de dados(PDF) 60 Page - Microchip Technology |
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MRF89XA Folha de dados(HTML) 60 Page - Microchip Technology |
60 / 140 page MRF89XA DS70000622D-page 60 Preliminary 2010-2017 Microchip Technology Inc. 3.3.6 POWER AMPLIFIER 3.3.6.1 Rise and Fall Time Control In OOK mode, the PA ramp times can be accurately controlled through the PARC<1:0> bits (PACONREG<4:3>). These bits directly control the slew rate of the PARS pin. TABLE 3-2: POWER AMPLIFIER RISE/ FALL TIMES 3.3.7 TRANSMIT MODE REGISTERS The registers associated with the Transmit mode are: • GCONREG (Register 2-1) •DMODREG (Register 2-2) •FDEVREG (Register 2-3) • BRSREG (Register 2-4) •R1CREG (Register 2-7) • P1CREG (Register 2-8) • S1CREG (Register 2-9) •R2CREG (Register 2-10) • P2CREG (Register 2-11) • S2CREG (Register 2-12) • PACREG (Register 2-13) • FTXRXIREG (Register 2-14) • FTPRIREG (Register 2-15) During the Transmit mode of the MRF89XA, the Shift register takes bytes from the FIFO and outputs them serially (MSb first) at the programmed bit rate to the modulator. When the transmitter is enabled, it starts sending out data from the Shift register with respect to the set bit rate. After power-up and with the Transmit registers enabled, the transmitter preloads the FIFO with preambles before sending the actual data based on the mode of operation. Figure 3-4 illustrates the PA Control Timing. FIGURE 3-4: PA TIMING CONTROL PARC<1:0> tPARS tPAOUT (rise/fall) 00 3 µs 2.5/2 µs 01 8.5 µs 5/3 µs 10 15 µs 10/6 µs 11 23 µs 20/10 µs DATA PARS [V] 95% tPARS tPARS 95% 60 dB 60 dB PA Output Power tPA_OUT tPA_OUT |
Nº de peça semelhante - MRF89XA |
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Descrição semelhante - MRF89XA |
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