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TSM3N100CP Folha de dados(PDF) 2 Page - Taiwan Semiconductor Company, Ltd |
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TSM3N100CP Folha de dados(HTML) 2 Page - Taiwan Semiconductor Company, Ltd |
2 / 6 page TSM3N100CP Taiwan Semiconductor 2 Version: A1606 ELECTRICAL SPECIFICATIONS (T A = 25°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT Static Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 1000 -- -- V Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 3.5 4.5 5.5 V Gate Body Leakage VGS = ±30V, VDS = 0V IGSS -- -- ±100 nA Zero Gate Voltage Drain Current VDS = 1000V, VGS = 0V IDSS -- -- 1 µA Drain-Source On-State Resistance (Note 4) VGS = 10V, ID = 1.25A RDS(on) -- 5.6 6 Ω Dynamic (Note 5) Total Gate Charge VDS = 800V, ID = 2.5A, VGS = 10V Qg -- 19 -- nC Gate-Source Charge Qgs -- 6 -- Gate-Drain Charge Qgd -- 10 -- Input Capacitance VDS = 25V, VGS = 0V, f = 1.0MHz Ciss -- 664 -- pF Output Capacitance Coss -- 40 -- Reverse Transfer Capacitance Crss 17 Gate Resistance f = 1.0MHz, open drain Rg -- 2.2 -- Ω Switching (Note 6) Turn-On Delay Time VDD = 500V, RG = 25Ω, ID = 1.25A, VGS = 10V td(on) -- 45 -- ns Turn-On Rise Time tr -- 25 -- Turn-Off Delay Time td(off) -- 70 -- Turn-Off Fall Time tf -- 28 -- Source-Drain Diode Forward Voltage (Note 4) IS = 2.5A, VGS = 0V VSD -- -- 1.4 V Reverse Recovery Time VR = 100V, IS = 2.5A dIF/dt = 100A/μs trr -- 378 -- ns Reverse Recovery Charge Qrr -- 1.62 -- μC Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature 3. L = 20mH, IAS = 1.4A, VDD = 50V, RG = 25Ω, Starting TJ = 25 oC 4. Pulse test: PW ≤ 300µs, duty cycle ≤ 2% 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. ORDERING INFORMATION PART NO. PACKAGE PACKING TSM3N100CP ROG TO-252 (DPAK) 2,500pcs / 13” Reel |
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