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TC90A67F Folha de dados(PDF) 4 Page - Toshiba Semiconductor |
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TC90A67F Folha de dados(HTML) 4 Page - Toshiba Semiconductor |
4 / 24 page TC90A67F 2002-02-06 4 Terminal Function QFP80-P-1420-0.80B PIN Name I/O Function Condition 1 AVSS ¾ Ground for DAC 2 BIASA ¾ ADC bias voltage 3 VREFH ¾ Upper limit reference voltage of ADC normal: 2.3 V 4 AVSS ¾ Ground for ADC 5 CVI I Composite video signal input 6 AVDD ¾ Power supply for ADC 7 VREFL ¾ Lower limit reference voltage of ADC normal: 1.0 V 8 AVSS ¾ Ground for ADC 9 NC ¾ 10 CKOUT O 384fH-clock output 11 AVDD O Power supply for VCO 12 BIASD ¾ DAC bias voltage 13 VREF ¾ Lower limit reference voltage of DAC normal: 1.8 V 14 NC ¾ 15 NC ¾ 16 AVSS ¾ Ground for VCO 17 FILTER O VCO filter terminal 18 AVDD ¾ Power supply for DAC 19 CKIN I 384fH-clock input 20 NC ¾ 21 VSS ¾ Ground for digital circuit 22 CKC I Clock input (sub-picture) 23 CKCSEL I Internal/external 384fH VCO select L: internal, H: external 24 CLMP O Clamp level output 25 VDD ¾ Power supply for digital circuit 26 TEST I Test pin normal: H 27 VSS ¾ Ground for crystal oscillator 28 XI I 42 MHz crystal oscillator input 29 XO O 42 MHz crystal oscillator output 30 NC ¾ 31 VDD ¾ Power supply for crystal oscillator 32 NC ¾ 33 NC ¾ 34 CSTD O Internal signal output 35 VSS ¾ Ground for DRAM 36 VDD ¾ Power supply for DRAM 37 PFIELD O Field odd/even output (main picture) H: even, L: odd 38 CFIELD O Field odd/even output (sub picture) H: even, L: odd 39 CVREF O Vertical sync. output (sub picture) 40 CHREF O Horizontal sync. output (sub picture) 41 NC ¾ |
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