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SLG46400 Folha de dados(PDF) 93 Page - Dialog Semiconductor |
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SLG46400 Folha de dados(HTML) 93 Page - Dialog Semiconductor |
93 / 95 page 000-0046400-109 Page 87 of 89 SLG46400 27.0 Revision History Date Version Change 6/3/2015 1.09 Fixed package name Tape and Reel Spec 10/8/2014 1.08 Fixed typo in Tape and Reel Spec 8/6/2014 1.07 Fixed ESD information 11/21/2013 1.06 Added ESD Ratings and MSL to Absolute Maximum Conditions 9/24/2013 1.05 Updated conditions for VAIR in Electriical Characteristics for clarity. Updated Section 13 to clarify Counter functionality. 7/16/2013 1.04 Fixed Typo in Section 15.1 Diagram 06/04/2013 1.03 Updated 3bit LUT and 4bit LUT Standard Digital Functions tables 02/05/2013 1.02 SLG46400 Rev. B: Updated ADC Functional Diagram (Figure 3) Updated ACMP0 IN+ source selection information and ACMP0 Functional Diagram (Sec- tion 10.1 and Figure 8) Updated ACMP0 Register Settings (reg<735> and reg<739>) Corrected FSM0 and FSM1 UP/DOWN operation descriptions (Sections 13.7 and 13.9, Figures 19 and 21) Added Frequency Dividers Control function description (Section 16.3) Updated RC OSC Register Settings Updated RC OSC Typical Frequency Selection, Table 24 Updated Register Definition (RC OSC Frequency Control, reg<586:583>) Updated Register Definition (ACMP0 IN+ Source Selection, reg<739, 735>) Updated Register Definition (RC OSC Dividers Control, reg<816>) 11/19/2012 1.01 Updated Electrical Characteristics Table (VIL values) Fixed typo in Section 10.9 (less than or equal sign) 9/19/2012 1.0 Fixed typo in Section 10.9 Description 7/27/2012 0.92 Fixed typo in Electrical Characteristics table Updated Section 12.2 for clarification 7/16/2012 0.91 Editorial changes for clarification and typo fixes throughout Renamed Signal names to match GreenPAK Designer Software Moved Bi-Directional Pin example to Section 21.0 6/27/2012 0.9 Updated Electrical Characteristics Table Corrected Section 9.4 regarding 2-Channel Selection (Pin 12 instead of Pin 2) Updated Section10.0 to clarify ACMP power down operation and fixed ACMP hysteresis values in Sections 6.4, 10.9, and 10.10.1 Updated Section 12.10 regarding poiwer down control Renamed Section 16.0 RC Oscillator to Clock Management and clarified operation and updated block diagram. Updated Section 13.12 to include short pulse delay time diagrams. Removed Application Example regarding time delay Updated register map 6/8/2012 0.85 Updated Section 13.4 Added note regarding minimum value of the register setting for the CNT/DLY cells 3/20/2012 0.84 Editorial changes for clarification and typo fixes throughout 1/27/2012 0.83 Editorial changes for clarification and typo fixes throughout Updated Section 9.9 ADC Outputs Updated Section 13.1 Counter Functionality Updated Section 13.7 and 13.9 regarding FSM Operation Updated Recommended Soldering Profile information 12/5/2011 0.82 Added Recommended Soldering Profile information 11/3/2011 0.81 Added Bi-Directional Pin Information 9/19/2011 0.8 Production release 9/18/2011 0.53 General updates |
Nº de peça semelhante - SLG46400 |
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Descrição semelhante - SLG46400 |
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