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SLG46534 Folha de dados(PDF) 48 Page - Dialog Semiconductor |
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SLG46534 Folha de dados(HTML) 48 Page - Dialog Semiconductor |
48 / 172 page SLG46534_DS_107 Page 47 of 171 SLG46534 9.1.2 2-Bit LUT or D Flip Flop Macrocells Used as D Flip Flop Register Settings Table 33. DFF0 Register Settings Signal Function Register Bit Address Register Definition LUT2_0 or DFF0 Select <1191> 0: LUT2_0 1: DFF0 DFF0 Initial Polarity Select <1205> 0: Low 1: High DFF0 Output Select <1206> 0: Q output 1: nQ output DFF0 or Latch Select <1207> 0: DFF function 1: Latch function Table 34. DFF1 Register Settings Signal Function Register Bit Address Register Definition LUT2_1 or DFF1 Select <1190> 0: LUT2_1 1: DFF1 DFF1 Initial Polarity Select <1201> 0: Low 1: High DFF1 Output Select <1202> 0: Q output 1: nQ output Select or Latch select <1203> 0: DFF function 1: Latch function Table 35. DFF2 Register Settings Signal Function Register Bit Address Register Definition LUT2_2 or DFF2 Select <1189> 0: LUT2_2 1: DFF2 DFF2 Initial Polarity Select <1213> 0: Low 1: High DFF2 Output Select <1214> 0: Q output 1: nQ output DFF2 or Latch Select <1215> 0: DFF function 1: Latch function |
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Descrição semelhante - SLG46534 |
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