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SLG46534 Folha de dados(PDF) 50 Page - Dialog Semiconductor

Nome de Peças SLG46534
Descrição Electrónicos  GreenPAK Programmable Mixed-signal Matrix with Asynchronous State Machine
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SLG46534
9.3 3-Bit LUT or D Flip Flop with Set/Reset Macrocells
There are five macrocells that can serve as either 3-bit LUTs or as D Flip Flops with Set/Reset inputs. When used to implement
LUT functions, the 3-bit LUTs each take in three input signals from the connection matrix and produce a single output, which goes
back into the connection matrix. When used to implement D Flip Flop function, the three input signals from the connection matrix
go to the data (D) and clock (clk) and Set/Reset (nRST/nSET) inputs for the Flip Flop, with the output going back to the connection
matrix.
DFF3 has a user selectable option to allow the macrocell output to either come from the Q/nQ output of one D Flip Flop, or two
D Flip Flops in series, with the first D Flip Flop triggering on the rising clock edge, and the second D Flip Flop triggering on the
falling clock edge.
Figure 14. 3-bit LUT0 or DFF3 with RST/SET
DFF3
clk
D
To Connection Matrix
Input <12>
8-bits NVM
From Connection
Matrix Output <70>
1-bit NVM
3-bit LUT0 OUT
IN1
IN2
IN0
nRST/nSET
From Connection
Matrix Output <69>
From Connection
Matrix Output <68>
reg <1223:1216>
reg <1187>
reg <1471> Selects output from one or two DFF
Q/nQ
DD
Q
Q
reg <1222>
reg <1471>
LUT Truth
Table
reg <1223> DFF or Latch Select
reg <1222> Output Select (Q or nQ)
reg <1221> DFF nRST or nSET Select
reg <1220> DFF Initial Polarity Select
0: 3-bit LUT0 IN1
1: DFF3 D
0: 3-bit LUT0 IN2
1: DFF3 nRST/nSET
0: 3-bit LUT0 OUT
1: DFF3 OUT
0: 3-bit LUT0 IN0
1: DFF3 clk
S0
S1
S0
S1
S0
S1
S0
S1


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