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SLG46534 Folha de dados(PDF) 60 Page - Dialog Semiconductor |
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SLG46534 Folha de dados(HTML) 60 Page - Dialog Semiconductor |
60 / 172 page SLG46534_DS_107 Page 59 of 171 SLG46534 Table 51. DFF5 Register Settings Signal Function Register Bit Address Register Definition LUT3_2 or DFF5 Select reg<1185> 0: LUT3_2 1: DFF5 DFF5 Initial Polarity Select reg<1236> 0: Low 1: High DFF5 nRST/nSET Select reg<1237> 1: nSET from matrix out 0: nRST from matrix out DFF5 Output Select reg<1238> 0: Q output 1: nQ output DFF5 or Latch Select reg<1239> 0: DFF function 1: Latch function Table 52. DFF6 Register Settings Signal Function Register Bit Address Register Definition LUT3_3 or DFF6 Select reg<1184> 0: LUT3_3 1: DFF6 DFF6 Initial Polarity Select reg<1244> 0: Low 1: High DFF6 nRST/nSET Select reg<1245> 1: nSET from matrix out 0: nRST from matrix out DFF6 Output Select reg<1246> 0: Q output 1: nQ output DFF6 or Latch Select reg<1247> 0: DFF function 1: Latch function Table 53. DFF7 Register Settings Signal Function Register Bit Address Register Definition LUT3_4 or DFF7 Select reg<1199> 0: LUT3_4 1: DFF7 DFF7 Initial Polarity Select reg<1252> 0: Low 1: High DFF7 nRST/nSET Select reg<1253> 1: nSET from matrix out 0: nRST from matrix out DFF7 Output Select reg<1254> 0: Q output 1: nQ output DFF7 or Latch Select reg<1255> 0: DFF function 1: Latch function |
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