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M27W512-120F6TR Folha de dados(PDF) 6 Page - STMicroelectronics

Nome de Peças M27W512-120F6TR
Descrição Electrónicos  512 Kbit (64K x8) Low Voltage UV EPROM and OTP EPROM
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
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M27W512-120F6TR Folha de dados(HTML) 6 Page - STMicroelectronics

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M27W512
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DEVICE OPERATION
The modes of operations of the M27W512 are list-
ed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GVPP and 12V on A9 for
Electronic Signature.
Read Mode
The M27W512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least tAVQV-tGLQV.
Standby Mode
The M27W512 has a standby mode which reduc-
es the supply current from 15mA to 15µA with low
voltage operation VCC ≤ 3.6V, see Read Mode DC
Characteristics table for details. The M27W512 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the GVPP input.
Table 2. Operating Modes
Note: X = VIH or VIL, VID = 12V ± 0.5V.
Table 3. Electronic Signature
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a.
the lowest possible memory power
dissipation,
b.
complete assurance that output bus
contention will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
Mode
E
GVPP
A9
Q7-Q0
Read
VIL
VIL
X
Data Out
Output Disable
VIL
VIH
XHi-Z
Program
VIL Pulse
VPP
XData In
Program Inhibit
VIH
VPP
XHi-Z
Standby
VIH
XX
Hi-Z
Electronic Signature
VIL
VIL
VID
Codes
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer’s Code
VIL
00100000
20h
Device Code
VIH
00111101
3Dh


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