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MP2158A Folha de dados(PDF) 12 Page - Monolithic Power Systems

Nome de Peças MP2158A
Descrição Electrónicos  1A, 6V, 1.5MHz, 17uA IQ, COT Synchronous Step-Down Converter in Ultra-Small 2x1.5mm QFN-8
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Fabricante Electrônico  MPS [Monolithic Power Systems]
Página de início  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2158A Folha de dados(HTML) 12 Page - Monolithic Power Systems

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MP2158A – 1A, 6V, 1.5MHz SYNCHRONOUS STEP-DOWN CONVERTER
MP2158A Rev. 1.02
www.MonolithicPower.com
12
6/30/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic, low
ESR capacitors are recommended to keep the
output voltage ripple low. The output voltage
ripple can be estimated with Equation (8):
OUT
OUT
OUT
ESR
S1
IN
S
VV
1
V1
R
fL
V
8 f
C2



 


 
 
(8)
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
When using ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance, which mainly causes output
voltage ripples. For simplification, the output
voltage ripple can be estimated with Equation
(9):
OUT
OUT
OUT
2
IN
S1
VV
ΔV1
V
8f
L
C2

 

 

(9)
When using tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated with
Equation (10):
OUT
OUT
OUT
ESR
IN
S1
VV
ΔV1
R
fL
V

 


(10)
The characteristics of the output capacitor
affect the stability of the regulation system.
PCB Layout Guidelines
Efficient PCB layout is critical for achieving
stable operation. Poor layout design can result
in poor line or load regulation and stability
issues. For best results, refer to Figure 3 and
follow the guidelines below:
1. Place the high-current paths (GND, VIN,
and SW) as close to the device as
possible with short, direct, and wide
traces.
2. Place the input capacitor as close to VIN
and GND as possible.
3. Place the external feedback resistors
next to FB.
4. Keep the switching node (SW) short and
away from the feedback network.
EN
GND
OUT
SW
VIN
1
2
3
4
8
7
6
5
PG
R1
C2
R2
C1
Figure 3: Recommended PCB Layout
Design Example
Below is a design example following the
application guidelines for the specifications:
Table 2: Design Example
VIN
5V
VOUT
1.2V
fSW
1500kHz
The detailed application schematic is shown in
Figure 4. The typical performance and circuit
waveforms
are
shown
in
the
Typical
Performance Characteristics section on page 4.
For more device applications, please refer to
the related evaluation board datasheets.


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