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MTV212AS32 Folha de dados(PDF) 5 Page - List of Unclassifed Manufacturers

Nome de Peças MTV212AS32
Descrição Electrónicos  8051 Embedded Monitor Controller Mask ROM Type
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MYSON
TECHNOLOGY
MTV212A32
(Rev. 1.2)
Revision 1.2
- 5 -
2000/07/04
PIN CONFIGURATION
A “CMOS output pin” means it can sink and drive at least 4mA current. It’s not recommended to use such pin
as input fuction.
A “5V open drain pin” means it can sink at least 4mA current but only drive 10~20uA to VDD. It can be used
as input or output function and need an external pull up resistor.
A “8051 standard pin” is a pseudo open drain pin. It can sink at least 4mA current when output low level, and
drive at least 4mA current for 160nS when output transit from low to high, then keep drive 100uA to maintain
the pin at high level. It can be used as input or output function. It need an external pull up resistor when drive
heavy load device.
FUNCTIONAL DESCRIPTIONS
1. 8051 CPU Core
MTV212A32 includes all 8051 functions with the following exceptions:
1.1 PSEN, ALE, RD and WR pins are disabled. The external RAM access is restricted to XFRs within the
MTV212A32.
1.2 Port0, port3.3, port3.6 and port3.7 are not general-purpose I/O ports. They are dedicated to monitor
special application.
1.3 INT1 input pin is not provided, it is connected to special interrupt sources.
1.4 Port2 are shared with special function pins.
In addition, there are 2 timers, 5 interrupt sources and serial interface compatible with the standard 8051.
Note: All registers listed in this document reside in external RAM area (XFR). For internal RAM memory map
please refer to 8051 spec.
2. Memory Allocation
2.1 Internal Special Function Registers (SFR)
The SFR is a group of registers that are the same as standard 8051.
2.2 Internal RAM
There are total 256 bytes internal RAM in MTV212A32, same as standard 8052.
2.3 External Special Function Registers (XFR)
The XFR is a group of registers allocated in the 8051 external RAM area 00h - 7Fh. Most of the registers are
used for monitor control or PWM DAC. Program can initialize Ri value and use "MOVX" instruction to access
these registers.
2.4 Auxiliary RAM (AUXRAM)
There are total 256 bytes auxiliary RAM allocated in the 8051 external RAM area 80h - FFh. The AUXRAM is
divided into two banks, selected by XBANK register. Program can initialize Ri value and use "MOVX"
instruction to access the AUXRAM.


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