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RT6203B Datasheet(Folha de dados) 20 Page - Richtek Technology Corporation |
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20 page 
RT6203B 20 DS6203B-01 July 2017 www.richtek.com © Copyright 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. output voltage drops below 87.5% of its nominal voltage, PGOOD will be pulled low. It will be held low until the output voltage rises to 92.5% of the nominal voltage.During soft-start and in shutdown mode (EN pin pull low), PGOOD is actively held low. When the output voltage has reached 90% of its nominal voltage and the soft-start sequence is finished, PGOOD is high impedance and will be pulled high by the external pull-up resistor. External Bootstrap Diode Connect a 0.1 μF low ESR ceramic capacitor between the BOOT and SW pins. This capacitor provides the gate driver voltage for the high-side MOSFET. It is recommended to add an external bootstrap diode between an external 5V and BOOT pin for efficiency improvement when input voltage is lower than 5.5V. The bootstrap diode can be a low cost one such as IN4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the RT6203B Note that the external boot voltage must be lower than 5.5V. External BOOT Capacitor Series Resistor The internal power MOSFET gate driver is not only optimized to turn the switch on fast enough to minimize switching loss, but also slow enough to reduce EMI. Since the switch rapidly turn-on will induce high di/dt noise which let EMI issue much worse. During switch turn-off, SW is discharged relatively slowly by the inductor current during the dead time between high-side and low-side switch on- times. In some cases it is desirable to reduce EMI further, at the expense of some additional power dissipation. The switch turn-on can be slowed by placing a small (<47 Ω) resistance between BOOT and the external bootstrap capacitor. This will slow the high-side switch turn-on speed and VSW's rise. The recommended external diode connection is shown in Figure 5, using external diode to charge the BOOT capacitor, and place a resistor between BOOT and the capacitor/diode connection to reduce turn- on speed for any EMI issue consideration. Figure 5. External Bootstrap Diode and BOOT Capacitor Series Resistor SW BOOT 5V 0.1µF RT6203B R Thermal Considerations The junction temperature should never exceed the absolute maximum junction temperature TJ(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TAis the ambient temperature, and θJA is the junction-to-ambient thermal resistance. For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125 °C. The junction-to-ambient thermal resistance, θJA, is highly package dependent. For a WQFN-20L 4x4 package, the thermal resistance, θJA, is 28 °C/W on a standard JEDEC 51-7 high effective-thermal- conductivity four-layer test board. The maximum power dissipation at TA = 25 °C can be calculated as below : PD(MAX) = (125 °C − 25°C) / (28°C/W) = 3.57W for a WQFN-20L 4x4 package. The maximum power dissipation depends on the operating ambient temperature for the fixed TJ(MAX) and the thermal resistance, θJA. The derating curves in Figure 6 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. |
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