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CD4073B Folha de dados(PDF) 1 Page - Silicon Supplies |
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CD4073B Folha de dados(HTML) 1 Page - Silicon Supplies |
1 / 5 page CMOS High Voltage Logic – CD4073B Triple 3-Input AND Gate Logic IC in bare die form Die Size (Unsawn) 1450 x 1250 57 x 49 µm mils Minimum Bond Pad Size 100 x 100 3.94 x 3.94 µm mils Die Thickness 350 (±20) 13.78 (±0.79) µm mils Top Metal Composition Al 1%Si 1.1µm Back Metal Composition N/A – Bare Si High Input Voltage up to 20V Drives x2 Low-Power TTL loads or x1 LSTTL load Symmetrical Sink & Source Currents All outputs buffered Direct drop-in replacement for obsolete components in long term programs. Rev 1.0 15/03/18 Features: Description The CD4073B Triple 3-Input AND Gate is fabricated using a 3µm 15CMOS process. This device consists of three independent circuits providing the system designer with direct implementation of the AND function. The device primarily finds use where high input voltage, low power dissipation and/or high noise immunity is desired. Inputs are protected against ESD and voltage transients by diode clamps to VDD and VSS. Ordering Information Die Dimensions in µm (mils) 1450 (57) The following part suffixes apply: No suffix - MIL-STD-883 /2010B Visual Inspection “H” - MIL-STD-883 /2010B Visual Inspection + MIL-PRF-38534 Class H LAT “K” - MIL-STD-883 /2010A Visual Inspection (Space) + MIL-PRF-38534 Class K LAT LAT = Lot Acceptance Test. For further information on LAT process flows see below. www.siliconsupplies.com\quality\bare-die-lot-qualification Supply Formats: Mechanical Specification Default – Die in Waffle Pack (400 per tray capacity) Sawn Wafer on Tape – On request Unsawn Wafer – On request Die Thickness <> 350µm(14 Mils) – On request Assembled into Ceramic Package – On request Page 1 of 5 www.siliconsupplies.com |
Nº de peça semelhante - CD4073B |
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Descrição semelhante - CD4073B |
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