BM83 datasheet(44/74 Pages) MICROCHIP

Nome de Peças	BM83

Descrição Electrónicos	BM83 Bluetooth짰 Stereo Audio Module Data Sheet

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Fabricante Electrônico	MICROCHIP [Microchip Technology]

Página de início	http://www.microchip.com

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Figure 6-7. Timing Sequence of Power Drop Protection

BAT_IN +4V

RST_N from Reset IC

Power

BAT_IN

BM83

Reset

OUT

VDD

GND

MCU Reset

Reset IC

2.93V

2.7V

Timing sequence of power drop protection:

• It is recommended to use the battery to provide the power supply at BAT_IN in to the module.

• If an external power source or a power adapter is utilized to provide power to the module (BAT_IN), it is

recommended to use a voltage supervisor Integrated Circuit (IC).

• The Reset IC output pin, RST_N, must be open drain type and threshold voltage as 2.93V.

• The RST_N signal must be fully pulled low before BAT_IN power drop to 2.7V

6.2

I2S Interface

The BM83 module provides an I2S digital audio input, output or input/output interface to connect with the external

codec or DSP. It provides 8, 16, 44.1, 48, 88.2, and 96 kHz sampling rates for 16-bit and 24-bit data formats. The

following are the BM83 module interface signals:

• MCLK1 – Master Clock (BM83 output)

• SCLK1– Serial/Bit Clock (BM83 input/output)

• DR1 – Receive Data (BM83 input)

• RFS1 – Receive Frame Sync (BM83 input/output)

• DT1 – Transmit Data (BM83 output)

Note: The I2S parameters can be configured by using the Config Tool.

I2S supports the following modes:

• Master mode

– The BM83 serves as a master to provide clock and frame synchronous signals for the master/slave data

synchronizations, as illustrated in the following figures. The MCLK1 is the master clock output provided to

an external I2S device to drive its system clock and save crystal cost. The MCLK is optional and is not

required if the external I2S device can drive its system clock on its own.

BM83

Application Information

Preliminary Datasheet

DS70005402A-page 44

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