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MC10H211L Folha de dados(PDF) 1 Page - ON Semiconductor

Nome de Peças MC10H211L
Descrição Electrónicos  Dual 3-Input 3-Output NOR Gate
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
2–296
REV 5
© Motorola, Inc. 1996
3/93
Dual 3-Input 3-Output NOR
Gate
The MC10H211 is designed to drive up to six transmission lines simultan–
eously. The multiple outputs of this device also allow the wire “OR”–ing of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines with minimum propagation delay
from a single point makes the MC10H211 particularly useful in clock distribution
applications where minimum clock skew is desired.
• Propagation Delay, 1.0 ns Typical
• Power Dissipation, 160 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
VEE
–8.0 to 0
Vdc
Input Voltage (VCC = 0)
VI
0 to VEE
Vdc
Output Current — Continuous
— Surge
Iout
50
100
mA
Operating Temperature Range
TA
0 to +75
°C
Storage Temperature Range — Plastic
— Ceramic
Tstg
–55 to +150
–55 to +165
°C
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
42
38
42
mA
Input Current High
IinH
720
450
450
µA
Input Current Low
IinL
0.5
0.5
0.3
µA
High Output Voltage
VOH
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Vdc
Low Output Voltage
VOL
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
VIH
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
VIL
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
AC PARAMETERS
Propagation Delay
tpd
0.7
1.6
0.7
1.6
0.7
1.7
ns
Rise Time
tr
0.9
2.0
0.9
2.2
0.9
2.4
ns
Fall Time
tf
0.9
2.0
0.9
2.2
0.9
2.4
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated
through a 50–ohm resistor to –2.0 volts.
Note: If crosstalk is present, double bypass capacitor to 0.2
µF.
MC10H211
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
AOUT
AIN
AIN
AIN
VEE
VCC2
VCC1
BOUT
BOUT
BOUT
BIN
BIN
BIN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VCC1 = PINS 1, 15
VCC2 = PIN 16
VEE = PIN 8
12
11
10
9
13
14
2
7
6
5
3
4
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).


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