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MC33065DW Folha de dados(PDF) 11 Page - ON Semiconductor

Nome de Peças MC33065DW
Descrição Electrónicos  HIGH PERFORMANCE DUAL CHANNEL CURRENT MODE CONTROLLER
Download  15 Pages
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Fabricante Electrônico  ONSEMI [ON Semiconductor]
Página de início  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC33065DW Folha de dados(HTML) 11 Page - ON Semiconductor

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MC34065 MC33065
11
MOTOROLA ANALOG IC DEVICE DATA
Figure 21. Adjustable Reduction of Clamp Level
with Soft–Start
Figure 22. MOSFET Parasitic Oscillations
Figure 23. Current Sensing Power MOSFET
Figure 24. Current Waveform Spike Suppression
+
+
+
Vin
VCC
16
+
+
Q1
RS
6
7
5.0 Vref
20 k
Bias
R
R
Vref
15
1
3
2
4
5
MPSA63
R1
R2
C
EA1
2R
0.5 V
R
VClamp
PWM
Latch 1
S
R
Q
Where: 0
≤ VClamp ≤ 0.5 V
Osc
_
_
+
Series gate resistor Rg may be needed to damp high frequency
parasitic oscillations caused by the MOSFET input capacitance
and any series wiring inductance in the gate–source circuit. Rg
will decrease the MOSFET switching speed. Schottky diode
D1 is required if circuit ringing drives the output pin below
ground.
+
+
+
VCC
16
+
5.0 Vref
+
PWM
Latch 1
Q
S
R
1N5819
Rg
Q1
RS
7
6
Vin
D1
_
Virtually lossless current sensing can be achieved with the implementation
of a SENSEFET power switch. For proper operation during over current
conditions, a reduction of the Ipk(max) clamp level must be implemented.
Refer to Figures 19 and 21.
+
+
S
R
Q
VCC
Vin
5.0 Vref
PWM
Latch 1
7
6 RS
1/4W
D
S
K
M
G
SENSEFET
Power Ground to
Input Source Return
Drive Ground
to Pin 9
Control Circuitry
Ground to Pin 8
If: SENSEFET = MTP10N10M
RS = 200
Then: VPin 6 = 0.075 Ipk
+
_
_
16
The addition of the RC filter will eliminate instability caused by
the leading edge spike on the current waveform.
Vin
Q1
RS
+
5.0 Vref
S
R
Q
PWM
Latch 1
7
6
C
R
17 V
V
Clamp [
1.67
R2
R1
) 1
I
pk(max) [
V
Clamp
R
S
17 V
V
Pin 6 [
R
S
I
pk
R
DS(on)
R
DM(on) )
R
S
17 V
17 V
+
+
+
VCC
16
+
_
+
+
t
Soft–Start +
ln
1
1–
V
C
3V
Clamp
C
R1R2
R1
) R2


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