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MC34262D Folha de dados(PDF) 7 Page - ON Semiconductor

Nome de Peças MC34262D
Descrição Electrónicos  POWER FACTOR CONTROLLERS
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Fabricante Electrônico  ONSEMI [ON Semiconductor]
Página de início  http://www.onsemi.com
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MC34262 MC33262
7
MOTOROLA ANALOG IC DEVICE DATA
Error Amplifier
An Error Amplifier with access to the inverting input and
output is provided. The amplifier is a transconductance type,
meaning that it has high output impedance with controlled
voltage–to–current gain. The amplifier features a typical gm
of 100
µmhos (Figure 5). The noninverting input is internally
biased at 2.5 V
± 2.0% and is not pinned out. The output
voltage of the power factor converter is typically divided down
and monitored by the inverting input. The maximum input
bias current is – 0.5
µA, which can cause an output voltage
error that is equal to the product of the input bias current and
the value of the upper divider resistor R2. The Error Amp
output is internally connected to the Multiplier and is pinned
out (Pin 2) for external loop compensation. Typically, the
bandwidth is set below 20 Hz, so that the amplifier’s output
voltage is relatively constant over a given ac line cycle. In
effect, the error amp monitors the average output voltage of
the converter over several line cycles. The Error Amp output
stage was designed to have a relatively constant
transconductance over temperature. This allows the
designer to define the compensated bandwidth over the
intended operating temperature range. The output stage can
sink and source 10
µA of current and is capable of swinging
from 1.7 V to 6.4 V, assuring that the Multiplier can be driven
over its entire dynamic range.
A key feature to using a transconductance type amplifier,
is that the input is allowed to move independently with
respect to the output, since the compensation capacitor is
connected to ground. This allows dual usage of of the Voltage
Feedback Input pin by the Error Amplifier and by the
Overvoltage Comparator.
Overvoltage Comparator
An Overvoltage Comparator is incorporated to eliminate
the possibility of runaway output voltage. This condition can
occur during initial startup, sudden load removal, or during
output arcing and is the result of the low bandwidth that must
be used in the Error Amplifier control loop. The Overvoltage
Comparator monitors the peak output voltage of the
converter, and when exceeded, immediately terminates
MOSFET switching. The comparator threshold is internally
set to 1.08 Vref. In order to prevent false tripping during
normal operation, the value of the output filter capacitor C3
must be large enough to keep the peak–to–peak ripple less
than 16% of the average dc output. The Overvoltage
Comparator input to Drive Output turn–off propagation delay
is typically 400 ns. A comparison of startup overshoot without
and with the Overvoltage Comparator circuit is shown in
Figure 23.
Multiplier
A single quadrant, two input multiplier is the critical
element that enables this device to control power factor. The
ac full wave rectified haversines are monitored at Pin 3
with respect to ground while the Error Amp output at Pin 2 is
monitored with respect to the Voltage Feedback Input
threshold. The Multiplier is designed to have an extremely
linear transfer curve over a wide dynamic range, 0 V to 3.2 V
for Pin 3, and 2.0 V to 3.75 V for Pin 2, Figure 1. The Multiplier
output controls the Current Sense Comparator threshold as
the ac voltage traverses sinusoidally from zero to peak line,
Figure 18. This has the effect of forcing the MOSFET on–time
to track the input line voltage, resulting in a fixed Drive Output
on–time, thus making the preconverter load appear to be
resistive to the ac line. An approximation of the Current
Sense Comparator threshold can be calculated from the
following equation. This equation is accurate only under the
given test condition stated in the electrical table.
VCS, Pin 4 Threshold ≈ 0.65 (VPin 2 – Vth(M)) VPin 3
A significant reduction in line current distortion can be
attained by forcing the preconverter to switch as the ac line
voltage crosses through zero. The forced switching is
achieved by adding a controlled amount of offset to the
Multiplier and Current Sense Comparator circuits. The
equation shown below accounts for the built–in offsets and is
accurate to within ten percent. Let Vth(M) = 1.991 V
VCS, Pin 4 Threshold = 0.544 (VPin 2 – Vth(M)) VPin 3
+ 0.0417 (VPin 2 – Vth(M))
Zero Current Detector
The MC34262 operates as a critical conduction current
mode controller, whereby output switch conduction is initiated
by the Zero Current Detector and terminated when the peak
inductor current reaches the threshold level established by
the Multiplier output. The Zero Current Detector initiates the
next on–time by setting the RS Latch at the instant the
inductor current reaches zero. This critical conduction mode
of operation has two significant benefits. First, since the
MOSFET cannot turn–on until the inductor current reaches
zero, the output rectifier reverse recovery time becomes less
critical, allowing the use of an inexpensive rectifier. Second,
since there are no deadtime gaps between cycles, the ac line
current is continuous, thus limiting the peak switch to twice
the average input current.
The Zero Current Detector indirectly senses the inductor
current by monitoring when the auxiliary winding voltage falls
below 1.4 V. To prevent false tripping, 200 mV of hysteresis is
provided. Figure 9 shows that the thresholds are
well–defined over temperature. The Zero Current Detector
input is internally protected by two clamps. The upper 6.7 V
clamp prevents input overvoltage breakdown while the lower
0.7 V clamp prevents substrate injection. Current limit
protection of the lower clamp transistor is provided in the
event that the input pin is accidentally shorted to ground. The
Zero Current Detector input to Drive Output turn–on
propagation delay is typically 320 ns.


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