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ISL1209IU10 Folha de dados(PDF) 8 Page - Intersil Corporation

Nome de Peças ISL1209IU10
Descrição Electrónicos  Low Power RTC with Battery Backed SRAM and Event Detection
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Fabricante Electrônico  INTERSIL [Intersil Corporation]
Página de início  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL1209IU10 Folha de dados(HTML) 8 Page - Intersil Corporation

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FN6109.1
September 27, 2005
has occurred and requests action. It is an open drain
active low output.
• Frequency Output Mode. The pin outputs a clock signal
which is related to the crystal frequency. The frequency
output is user selectable and enabled via the I2C bus. It is
an open drain active low output.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
VBAT pin is activated to minimize power consumption.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor.
The output circuitry controls the fall time of the output signal
with the use of a slope controlled pull-down. The circuit is
designed for 400kHz I2C interface speeds. It is disabled
when the backup power supply on the VBAT pin is activated.
VDD, GND
Chip power supply and ground pins. The device will operate
with a power supply from VDD=2.7V to 5.5VDC. A 0.1µF
capacitor is recommended on the VDD pin to ground.
Functional Description
Power Control Operation
The power control circuit accepts a VDD and a VBAT input.
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
the ISL1209 for up to 10 years. Another option is to use a
Super Cap for applications where VDD is interrupted for up
to a month. See the Applications Section for more
information.
Normal Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal Mode
(VDD)
The ISL1209 device will switch from the VBAT to VDD mode
when one of the following conditions occurs:
Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
These power control situations are illustrated in Figures 9
and 10.
The I2C bus is deactivated in battery backup mode to provide
lower power. Aside from this, all RTC functions are
operational during battery backup mode. Except for SCL and
SDA, all the inputs and outputs of the ISL1209 are active
during battery backup mode unless disabled via the control
register. The User SRAM is operational in battery backup
mode down to 1.8V.
Power Failure Detection
The ISL1209 provides a Real Time Clock Failure Bit (RTCF)
to detect total power failure. It allows users to determine if
the device has powered up after having lost all power to the
device (both VDD and VBAT).
Low Power Mode
The normal power switching of the ISL1209 is designed to
switch into battery backup mode only if the VDD power is
lost. This will ensure that the device can accept a wide range
of backup voltages from many types of sources while reliably
switching into backup mode. Another mode, called Low
VBAT - VBATHYS
VBAT
VBAT + VBATHYS
BATTERY BACKUP
MODE
VDD
VTRIP
2.2V
1.8V
FIGURE 9. BATTERY SWITCHOVER WHEN VBAT < VTRIP
FIGURE 10. BATTERY SWITCHOVER WHEN VBAT > VTRIP
VTRIP
VBAT
VTRIP + VTRIPHYS
BATTERY BACKUP
MODE
VDD
VTRIP
3.0V
2.2V
ISL1209


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