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MSP430F5507 Folha de dados(PDF) 63 Page - Texas Instruments |
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MSP430F5507 Folha de dados(HTML) 63 Page - Texas Instruments |
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63 / 125 page  63 MSP430F5510, MSP430F5509, MSP430F5508 MSP430F5507, MSP430F5506, MSP430F5505, MSP430F5504 MSP430F5503, MSP430F5502, MSP430F5501, MSP430F5500 www.ti.com SLAS645L – JULY 2009 – REVISED MAY 2020 Submit Documentation Feedback Product Folder Links: MSP430F5510 MSP430F5509 MSP430F5508 MSP430F5507 MSP430F5506 MSP430F5505 MSP430F5504 MSP430F5503 MSP430F5502 MSP430F5501 MSP430F5500 Detailed Description Copyright © 2009–2020, Texas Instruments Incorporated (1) Timer functions selectable through the port mapping controller. (2) Only on devices with ADC. 6.9.14 TB0 (Link to User's Guide) TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers. TB0 can support multiple capture/compares, PWM outputs, and interval timing (see Table 6-14). TB0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Table 6-14. TB0 Signal Connections INPUT PIN NUMBER DEVICE INPUT SIGNAL MODULE INPUT SIGNAL MODULE BLOCK MODULE OUTPUT SIGNAL DEVICE OUTPUT SIGNAL OUTPUT PIN NUMBER RGC, ZXH, ZQE(1) RGZ, PT(1) RGC, ZXH, ZQE(1) RGZ, PT(1) TB0CLK TBCLK Timer NA NA ACLK (internal) ACLK SMCLK (internal) SMCLK TB0CLK TBCLK TB0.0 CCI0A CCR0 TB0 TB0.0 ADC10 (internal)(2) ADC10SHSx = {2} ADC10 (internal)(2) ADC10SHSx = {2} TB0.0 CCI0B DVSS GND DVCC VCC TB0.1 CCI1A CCR1 TB1 TB0.1 ADC10 (internal) ADC10SHSx = {3} ADC10 (internal) ADC10SHSx = {3} CBOUT (internal) CCI1B DVSS GND DVCC VCC TB0.2 CCI2A CCR2 TB2 TB0.2 TB0.2 CCI2B DVSS GND DVCC VCC TB0.3 CCI3A CCR3 TB3 TB0.3 TB0.3 CCI3B DVSS GND DVCC VCC TB0.4 CCI4A CCR4 TB4 TB0.4 TB0.4 CCI4B DVSS GND DVCC VCC TB0.5 CCI5A CCR5 TB5 TB0.5 TB0.5 CCI5B DVSS GND DVCC VCC TB0.6 CCI6A CCR6 TB6 TB0.6 ACLK (internal) CCI6B DVSS GND DVCC VCC |
Nº de peça semelhante - MSP430F5507 |
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Descrição semelhante - MSP430F5507 |
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