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TDAT162G52-3BA Folha de dados(PDF) 6 Page - Agere Systems |
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TDAT162G52-3BA Folha de dados(HTML) 6 Page - Agere Systems |
6 / 810 page MARS2G5 P-Pro (TDAT162G52) SONET/SDH Data Sheet 155/622/2488 Mbits/s Data Interface August 18, 2004 6 Agere Systems Inc. List of Figures (continued) Figure Page Figure 52. STS-6c Offset Passing in an STS-12 RXT ......................................................................................... 399 Figure 53. Concatenated Offset Passing ............................................................................................................. 400 Figure 54. Overview of RXT Register Map .......................................................................................................... 414 Figure 55. DS3 Block Interface Diagram ............................................................................................................. 486 Figure 56. DS3 Receive Subblock ....................................................................................................................... 487 Figure 57. DS3/E3 Mappings .............................................................................................................................. 499 Figure 58. VC-3 Into an AU-3 .............................................................................................................................. 500 Figure 59. Asynchronous Mapping of 34,368 kbits/s Tributary Into VC-3 ........................................................... 501 Figure 60. G.832 E3 Frame Structure at 34,368 kbits/s ...................................................................................... 502 Figure 61. DS3 Multiframe Format ...................................................................................................................... 609 Figure 62. PLCP Mapping of ATM Cells .............................................................................................................. 610 Figure 63. MARS2G5 P-Pro PRBS Monitor/Generator Locations ....................................................................... 612 Figure 64. ATM Cell Format ................................................................................................................................ 624 Figure 65. Alpha-Delta Framer State Machine .................................................................................................... 626 Figure 66. Legend for Escaper Examples ........................................................................................................... 629 Figure 67. Escaping and EOP ............................................................................................................................. 629 Figure 68. Escaping Dry and Abort ..................................................................................................................... 630 Figure 69. Aborting a Dry .................................................................................................................................... 630 Figure 70. Framing and EOP ............................................................................................................................... 631 Figure 71. Framing Dry and Abort ....................................................................................................................... 631 Figure 72. Aborting a Dry .................................................................................................................................... 631 Figure 73. Bit-Synchronous HDLC Framer Operation ......................................................................................... 634 Figure 74. Bit-Synchronous HDLC Abort ............................................................................................................. 634 Figure 75. Bit-Synchronous HDLC Escaper Operation ....................................................................................... 635 Figure 76. Bit-Synchronous HDLC Escaper Abort .............................................................................................. 635 Figure 77. CRC-16 Checker Data Arriving Across Two Words ........................................................................... 636 Figure 78. CRC-32 Check Arriving Across Two Words ....................................................................................... 637 Figure 79. A CRC-16/32 Checker Circuit ............................................................................................................ 638 Figure 80. Normal CRC-16 and CRC-32 Cases .................................................................................................. 639 Figure 81. CRC Generator Block Diagram .......................................................................................................... 640 Figure 82. Assorted CRC Generator Cases ........................................................................................................ 641 Figure 83. Assorted CRC Generator Cases ........................................................................................................ 642 Figure 84. Assorted CRC Checker Cases ........................................................................................................... 643 Figure 85. Assorted CRC Checker Cases ........................................................................................................... 644 Figure 86. DE Counter Block ............................................................................................................................... 649 Figure 87. GFP Encapsulations of Packet Data .................................................................................................. 669 Figure 88. Special-Purpose GFP Header Definitions .......................................................................................... 669 Figure 89. Special-Purpose GFP Header Definitions .......................................................................................... 672 Figure 90. X43 Self-Synchronous Scrambler/Descrambler ................................................................................. 674 Figure 91. X48 Set-Reset Scrambler ................................................................................................................... 675 Figure 92. X48 Scrambler Synchronization State Machine ................................................................................. 676 Figure 93. UT48: Generic Structure of UTOPIA Block ........................................................................................ 717 Figure 94. Receive-Side Interface Handshaking in Point-to-Point Mode (RXPPA as Single Cycle) ................... 723 Figure 95. Transmit-Side Interface Handshaking in Point-to-Point Mode (TXPPA as Single Cycle) .................. 725 Figure 96. Near-End Loopback for Slice D .......................................................................................................... 729 Figure 97. Overall Structure for Receive Direction .............................................................................................. 731 Figure 98. Overall Structure for Transmit Direction ............................................................................................. 732 Figure 99. Four Groups of Multi-PHY Devices of Four Channels for Receive Direction ..................................... 733 Figure 100. Four Groups of Multi-PHY Devices of Four Channels for Transmit Direction .................................. 734 Figure 101. Two Groups of Multi-PHY Devices of Eight Channels for Receive Direction ................................... 735 Figure 102. Two Groups of Multi-PHY Devices of Eight Channels for Transmit Direction .................................. 736 |
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Descrição semelhante - TDAT162G52-3BA |
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