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74ABT841DB Folha de dados(PDF) 5 Page - NXP Semiconductors |
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74ABT841DB Folha de dados(HTML) 5 Page - NXP Semiconductors |
5 / 6 page Philips Semiconductors Product specification 74ABT841 10-bit bus interface latch (3-State) 5 1995 Sep 06 AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Min ts(H) ts(L) Setup time, High or Low Dn to LE 3 2.5 1.5 1.0 0.0 2.5 1.5 ns th(H) th(L) Hold time, High or Low Dn to LE 3 1.5 1.0 0.2 –0.8 1.5 1.0 ns tw(H) tw(L) LE pulse width High or Low 1 3.3 1.9 3.3 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V tw(H) VM VM VM VM VM tPHL tPLH LE Qn SA00248 SA00248 Waveform 1. Propagation Delay, Latch Enable Input to Output, and Enable Pulse Width VM VM VM VM Qn Dn tPLH tPHL SA00064 Waveform 2. Propagation Delay for Data to Outputs VM Dn VM VM VM VM VM LE ts(H) th(H) ts(L) th(L) NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SA00249 Waveform 3. Data Setup and Hold Times OE VM tPZH tPHZ 0V Qn VM VM SA00066 VOH–0.3V Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level OE tPZL tPLZ 0V Qn VM VM VM SA00067 VOL+0.3V Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level |
Nº de peça semelhante - 74ABT841DB |
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Descrição semelhante - 74ABT841DB |
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