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74ALVCH16601 Folha de dados(PDF) 10 Page - NXP Semiconductors |
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74ALVCH16601 Folha de dados(HTML) 10 Page - NXP Semiconductors |
10 / 12 page Philips Semiconductors Product specification 74ALVCH16601 18-bit universal bus transceiver (3-State) 1998 Sep 24 10 AC WAVEFORMS VCC = 2.3 TO 2.7 V RANGE 1. VM = 0.5 V 2. VX = VOL + 0.15V 3. VY = VOH – 0.15V 4. VI = VCC 5. VOL and VOH are the typical output voltage drop that occur with the output load. VCC = 3.0 TO 3.6 V RANGE AND VCC = 2.7 V 1. VM = 1.5 V 2. VX = VOL + 0.3V 3. VY = VOH – 0.3V 4. VI = 2.7 V 5. VOL and VOH are the typical output voltage drop that occur with the output load. SW00063 An, Bn INPUT VM tPHL tPLH VOL VI VM GND VOH Bn, An OUTPUT Waveform 1. Input (An, Bn) to output (Bn, An) propagation delays SW00134 CPXX INPUT VM tPHL tPLH VOL VI VM GND VOH An, Bn OUTPUT tW LEXX INPUT 1/fmax Waveform 2. Latch enable input (LEAB,LEBA) and clock pulse input (CPAB, CPBA) to output propagation delays and their pulse width tPLZ tPZL VI OEXX INPUT GND VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs en- abled outputs en- abled outputs dis- abled tPHZ VM VM VM tPZH VX VY SW00127 Waveform 3. 3-State enable and disable times VM An, Bn INPUT VM tSU NOTE: The unshaded areas indicate when the input is permitted to change for predictable output performance. SW00128 tSU th VI GND VI GND CPXX, LEXX INPUT th Waveform 4. Data set-up and hold times for the An and Bn inputs to the LEAB, LEBA, CPAB and CPBA inputs TEST CIRCUIT PULSE GENERATOR RT VIN D.U.T. VOUT CL VCC RL=500 Ω SWITCH POSITION TEST SWITCH tPLH/tPHL Open tPLZ/tPZL 2 <VCC tPHZ/tPZH GND Test Circuit for 3-State Outputs Open GND S1 2 <VCC DEFINITIONS VCC t 2.7V 2.7 – 3.6V VIN VCC 2.7V RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SW00047 RL=500 Ω Load circuitry for switching times |
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Descrição semelhante - 74ALVCH16601 |
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