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74ALVT162731DGG Folha de dados(PDF) 2 Page - NXP Semiconductors

Nome de Peças 74ALVT162731DGG
Descrição Electrónicos  2.5V/3.3V 1-to-4 address register/driver with 30ohm termination resistors 3-State
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Fabricante Electrônico  PHILIPS [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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Philips Semiconductors
Product specification
74ALVT162731
2.5V/3.3V 1-to-4 address register/driver with 30
termination resistors (3-State)
2
1999 Mar 23
853-2146 21078
FEATURES
5V I/O Compatible
3-State outputs
Output capability: +12 mA/-12 mA
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
Positive edge triggered registers
Latch-up protection exceeds 500 mA per JEDEC JC40.2 Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per machine model
Outputs include series resistance of 30Ω making external
termination resistors unnecessary
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74ALVT162731 is a high-performance BiCMOS product designed
for VCC operation at 2.5V to 3.3V with I/O compatibility up to 5V.
This device is a 1-to-4 address register/driver featuring non-inverting
3-State outputs. The state of the outputs are controlled by two
enable inputs (OE1 and OE2). Each enable input controls the state
of two of the four common outputs for each input. When an OEn
input is a logic High, the respective outputs will be in the high
impedance state. When an OEn input is a logic Low, the respective
outputs are active. The device can be configured for a transparent
mode from input to output or a register mode by the SEL input.
When SEL is a logic High the device is configured for transparent
mode and when SEL is a logic Low it is configured for register
mode. While in the register mode the output follows the input on the
rising edge of the CLK input. The function of the data registers is not
effected by either SEL or OEn.
The 74ALVT162731 is designed with 30
Ω series resistance in both
the HIGH and LOW states of the output.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
SYMBOL
PARAMETER
Tamb = 25°C; GND = 0V
2.5V
3.3V
UNIT
tPLH
tPHL
Propagation delay
nAx to nYx
CL = 50pF
3.8
3.2
ns
CIN
Input capacitance
VI = 0V or VCC
3
3
pF
COUT
Output capacitance
Outputs disabled; VO = 0V or VCC
9
9
pF
ICCZ
Total supply current
Outputs disabled
40
60
µA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
–40
°C to +85°C
74ALVT162731 DL
AV162731 DL
SOT371-1
56-Pin Plastic TSSOP Type II
–40
°C to +85°C
74ALVT162731 DGG
AV162731 DGG
SOT364-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 4, 19, 25, 28, 32, 38, 41, 47, 53
GND
Ground
5, 6, 23, 24, 30, 31, 36, 37, 42, 43,
48, 49, 54, 55
1Yn, 2Yn
Output, controlled by OE1
2, 3, 20, 21, 26, 27, 33, 34, 39, 40,
45, 46, 51, 52
3Yn,4Yn
Output, controlled by OE2
7, 22, 29, 35, 44, 50, 56
VCC
Positive power supply
8, 9, 10, 15, 16, 17, 18
An
Data inputs
14
SEL
Select input, controls mode of device
11
CLK
Clock input
12, 13
OEn
Output enable


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