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74ALVT16601DGG Folha de dados(PDF) 6 Page - NXP Semiconductors |
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74ALVT16601DGG Folha de dados(HTML) 6 Page - NXP Semiconductors |
6 / 14 page Philips Semiconductors Product specification 74ALVT16601 2.5V/3.3V 18-bit universal bus transceiver (3-State) 1998 Feb 13 6 AC CHARACTERISTICS (3.3V "0.3V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V UNIT MIN TYP1 MAX fMAX Maximum clock frequency 1 MHz tPLH tPHL Propagation delay An to Bn or Bn to An 2 1.0 1.0 1.5 1.9 2.3 2.9 ns tPLH tPHL Propagation delay Clock Low or High LEAB to Bn or LEBA to An 3 1.5 1.5 2.2 2.6 3.5 3.9 ns tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 1.5 1.5 2.2 2.9 3.3 4.1 ns tPZH tPZL Output enable time to High and Low level 5 6 1.0 1.0 2.3 1.6 3.9 2.8 ns tPHZ tPLZ Output disable time from High and Low Level 5 6 1.5 1.5 2.9 2.4 4.1 3.6 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENTS (3.3V "0.3V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V UNIT MIN TYP1 ts(H) ts(L) Setup time, High or Low An to CPAB or Bn to CPBA 4 1.5 1.5 0.4 0.6 ns th(H) th(L) Hold time, High or Low An to CPAB or Bn to CPBA 4 1.0 1.0 –0.5 –0.3 ns ts(H) ts(L) Setup time, High or Low Clock Low An to LEAB or Bn to LEBA 4 1.0 1.0 –0.5 –0.1 ns th(H) th(L) Hold time, High or Low Clock High An to LEAB or Bn to LEBA 4 1.5 1.5 0.1 0.5 ns ts(H) ts(L) Setup time CEAB before CPAB or CEBA before CPBA 4 1.5 1.0 0.3 –0.4 ns th(H) th(L) Hold time CEAB after CPAB or CEBA after CPBA 4 1.5 1.0 0.7 –0.3 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 2.0 2.0 ns tw(H) LEAB or LEBA pulse width, High 3 1.5 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. |
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Descrição semelhante - 74ALVT16601DGG |
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