Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

74LV74DB Folha de dados(PDF) 7 Page - NXP Semiconductors

Nome de Peças 74LV74DB
Descrição Electrónicos  Dual D-type flip-flop with set and reset; positive-edge trigger
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  PHILIPS [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LV74DB Folha de dados(HTML) 7 Page - NXP Semiconductors

Back Button 74LV74DB Datasheet HTML 3Page - NXP Semiconductors 74LV74DB Datasheet HTML 4Page - NXP Semiconductors 74LV74DB Datasheet HTML 5Page - NXP Semiconductors 74LV74DB Datasheet HTML 6Page - NXP Semiconductors 74LV74DB Datasheet HTML 7Page - NXP Semiconductors 74LV74DB Datasheet HTML 8Page - NXP Semiconductors 74LV74DB Datasheet HTML 9Page - NXP Semiconductors 74LV74DB Datasheet HTML 10Page - NXP Semiconductors 74LV74DB Datasheet HTML 11Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 12 page
background image
Philips Semiconductors
Product specification
74LV74
Dual D-type flip-flop with set and reset;
positive edge-trigger
1998 Apr 20
7
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V v 3.6V
VM = 0.5 * VCC at VCC t 2.7V and w 4.5V
VOL and VOH are the typical output voltage drop that occur with the
output load.
nQ OUTPUT
VM
nD INPUT
nCP INPUT
nQ OUTPUT
VM
VM
VM
tsu
1/fmax
th
th
tPHL
tPHL
tPLH
tPLH
tW
GND
GND
VI
VI
VOL
VOL
VOH
VOH
tsu
SV00335
Figure 1.The clock (nCP) to output (nQ, nQ) propagation
delays, the clock pulse width, the nD to nCP setup times, the
nCP to nD hold times, the output transition times and the
maximum clock pulse frequency
NOTE:
The shaded areas indicate when the input is permitted to change for
predictable output performance.
nCP INPUT
nSD INPUT
nRD INPUT
nQ OUTPUT
nQ OUTPUT
GND
GND
GND
VI
VI
VI
VOL
VOL
VOH
VOH
VM
VM
VM
VM
trem
tPHL
tPLH
tW
tW
VM
tPLH
tPHL
SV00336
Figure 2.The set (nSD) and reset (nRD) input to output (nQ, nQ)
propagation delays, the set and reset pulse widths and the nRD
to nCP removal time
TEST CIRCUIT
PULSE
GENERATOR
RT
Vl
D.U.T.
VO
CL
RL= 1k
Vcc
Test Circuit for Outputs
DEFINITIONS
VCC
VI
< 2.7V
2.7–3.6V
VCC
2.7V
TEST
tPLH/tPHL
≥ 4.5 V
VCC
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
50pF
RT = Termination resistance should be equal to ZOUT of pulse generators.
SV00902
Figure 3. Load circuitry for switching times


Nº de peça semelhante - 74LV74DB

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Nexperia B.V. All right...
74LV74D NEXPERIA-74LV74D Datasheet
251Kb / 15P
   Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 5 - 24 March 2021
74LV74D-Q100 NEXPERIA-74LV74D-Q100 Datasheet
1Mb / 17P
   Dual D-type flip-flop with set and reset; positive-edge trigger
More results

Descrição semelhante - 74LV74DB

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
NXP Semiconductors
74LVC74A PHILIPS-74LVC74A Datasheet
99Kb / 10P
   Dual D-type flip-flop with set and reset; positive-edge trigger
1998 Jun 17
logo
Integral Corp.
IN74LV74 INTEGRAL-IN74LV74 Datasheet
161Kb / 7P
   Dual D-type flip-flop with set and reset; positive-edge trigger
logo
Nexperia B.V. All right...
74HC74-Q100 NEXPERIA-74HC74-Q100 Datasheet
798Kb / 19P
   Dual D-type flip-flop with set and reset; positive edge-trigger
74LVC74A-Q100 NEXPERIA-74LVC74A-Q100 Datasheet
722Kb / 18P
   Dual D-type flip-flop with set and reset; positive-edge trigger
74LV74 NEXPERIA-74LV74 Datasheet
251Kb / 15P
   Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 5 - 24 March 2021
74LV74-Q100 NEXPERIA-74LV74-Q100 Datasheet
1Mb / 17P
   Dual D-type flip-flop with set and reset; positive-edge trigger
74AHC74-Q100 NEXPERIA-74AHC74-Q100 Datasheet
752Kb / 19P
   Dual D-type flip-flop with set and reset positive-edge trigger
74ABT74 NEXPERIA-74ABT74 Datasheet
227Kb / 13P
   Dual D-type flip-flop with set and reset; positive edge-trigger
Rev. 3 - 12 October 2020
74LVC74A NEXPERIA-74LVC74A Datasheet
266Kb / 16P
   Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 9 - 20 August 2021
logo
NXP Semiconductors
74HC74D-T NXP-74HC74D-T Datasheet
125Kb / 22P
   Dual D-type flip-flop with set and reset; positive-edge trigger
2003 Jul 10
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Folha de dados Download

Go To PDF Page


Ligação URL




Privacy Policy
ALLDATASHEETPT.COM
ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com