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MC74VHCT157A Folha de dados(PDF) 2 Page - ON Semiconductor |
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MC74VHCT157A Folha de dados(HTML) 2 Page - ON Semiconductor |
2 / 8 page MC74VHCT157A http://onsemi.com 2 Figure 1. Pin Assignment 4 7 9 12 2 3 5 6 11 10 14 13 15 1 A0 B0 A1 B1 A2 B2 A3 B3 Y0 Y1 Y2 Y3 E S DATA OUTPUTS NIBBLE INPUTS FUNCTION TABLE E S Y0 – Y3 A0 – A3, B0 – B3 = the levels of the respective Data–Word Inputs. H L L X L H L A0–A3 B0–B3 Inputs Outputs 3 E S A0 B0 A1 B1 A2 B2 2 5 6 11 10 14 13 12 9 7 4 Y0 MUX Y1 Y2 Y3 EN 1 15 A3 B3 G1 1 1 Figure 2. Expanded Logic Diagram 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 S Y0 B0 A0 Y1 B1 A1 GND Y3 B3 A3 E VCC B2 A2 Y2 Figure 3. IEC Logic Symbol This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance cir- cuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. |
Nº de peça semelhante - MC74VHCT157A |
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Descrição semelhante - MC74VHCT157A |
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