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AD1986 Folha de dados(PDF) 10 Page - Analog Devices |
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AD1986 Folha de dados(HTML) 10 Page - Analog Devices |
10 / 52 page AD1986 Rev. 0 | Page 10 of 52 tCLK_LOW tCLK_HIGH tCLK_PERIOD tSYNC_LOW tSYNC_PERIOD tSYNC_HIGH BIT_CLK SYNC Figure 5. Bit Clock and Sync Timing Table 17. Parameter Min Typ Max Units Symbol tSYNC_HIGH BITCLK High Pulse Width 40.5 41.7 nS tCLK_LOW BITCLK Low Pulse Width 39.7 40.6 nS tCLK_PERIOD BITCLK Period 81.4 nS BIT_CLK Frequency 12.288 MHz BIT_CLK Frequency Accuracy ±1.0 ppm BIT_CLK Jitter1, 2 750 ps tSYNC_HIGH Sync Active (High) Pulse Width 1.3 µS tSYNC_LOW Sync Inactive (Low) Pulse Width 19.5 µS tSYNC_PERIOD Sync Period 20.8 µS Sync Frequency 48.0 kHz 1 by design, but not production tested. r directly dependent on input clock jitter. Guaranteed 2 Output jitte BIT_CLK SYNC SDATA_IN SDATA_OUT BIT_CLK NOT TO SCALE SLOT 1 SLOT 2 WRITE TO 03 26 DATA PR4 tS2_PDOWN Figure 6. Link Low Power Mode Timing 18. Parameter Min Table Symbol Typ Max Units tS2_PDOWN End ATA_IN Low of Slot 2 to BIT_CLK, SD 0 1.0 µS |
Nº de peça semelhante - AD1986 |
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Descrição semelhante - AD1986 |
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