MOTOROLA CMOS LOGIC DATA

3

MC14519B

Characteristic

Symbol

VDD

Min

Typ #

Max

Unit

Output Rise and Fall Time

tTLH, tTHL = (1.5 ns/pF) CL + 25 ns

tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns

tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns

tTLH,

tTHL

5.0

10

15

—

—

—

100

50

40

200

100

80

ns

Propagation Delay Time

tPLH, tPHL = (1.7 ns/pF) CL + 165 ns

tPLH, tPHL = (0.66 ns/pF) CL + 82

tPLH, tPHL = (0.5 ns/pF) CL + 65 ns

tPLH,

tPHL

5.0

10

15

—

—

—

250

115

90

500

225

165

ns

* The formulas given are for the typical characteristics only at 25

_C.

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Figure 1. Dynamic Power Dissipation Test Circuit and Waveform

+VDD

Z0

Z1

Z2

Z3

A

B

X0

Y0

X1

Y1

X2

Y2

X3

Y3

CL

CL

CL

CL

VDD

VSS

ISS

Vin

500

µF

PULSE

GENERATOR

20 ns

20 ns

VDD

VSS

90%

10%

Vin

50% DUTY CYCLE

Figure 2. Switching Time Test Circuit and Waveforms

VDD

VDD

VSS

Z0

Z1

Z2

Z3

A

B

X0

Y0

X1

Y1

X2

X3

Y3

Y2

CL

CL

CL

CL

OUTPUTS

20 ns

20 ns

VDD

VSS

VOH

VOL

VOH

VOL

OUTPUT

OUTPUT

INPUT

90%

50%

10%

50%

90%

10%

50%

tPHL

tPHL

tPLH

tPLH

tTHL

tTLH

PULSE

GENERATOR