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MC12210D Folha de dados(PDF) 1 Page - Motorola, Inc

Nome de Peças MC12210D
Descrição Electrónicos  SERIAL INPUT PLL FREQUENCY SYNTHESIZER
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Fabricante Electrônico  MOTOROLA [Motorola, Inc]
Página de início  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC12210D Folha de dados(HTML) 1 Page - Motorola, Inc

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MC12210
Order this document by MC12210/D
SEMICONDUCTOR
TECHNICAL DATA
MECL PLL COMPONENTS
SERIAL PLL
FREQUENCY SYNTIESIZER
Device
Operating
Temperature Range
Package
ORDERING INFORMATION
MC12210D
MC12210DT
TA = – 40° to +85°C
SO–16
TSSOP–20
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
1
16
DT SUFFIX
PLASTIC PACKAGE
CASE 948E
(TSSOP–20)
1
20
Serial Input PLL Frequency
Synthesizer
The MC12210 is a 2.5 GHz Bipolar monolithic serial input phase locked
loop (PLL) synthesizer with pulse–swallow function. It is designed to provide
the high frequency local oscillator signal of an RF transceiver in handheld
communication applications.
Motorola’s advanced Bipolar MOSAIC
™ V technology is utilized for low
power operation at a minimum supply voltage of 2.7 V. The device is
designed for operation over 2.7 to 5.5 V supply range for input frequencies
up to 2.5 GHz with a typical current drain of 9.5 mA. The low power
consumption makes the MC12210 ideal for handheld battery operated
applications such as cellular or cordless telephones, wireless LAN or
personal communication services. A dual modulus prescaler is integrated to
provide either a 32/33 or 64/65 divide ratio.
For additional applications information, two
InterActiveApNote
documents containing software (based on a Microsoft Excel spreadsheet)
and an Application Note are available. Please order DK305/D and DK306/D
from the Motorola Literature Distribution Center.
Low Power Supply Current of 8.8 mA Typical for ICC and 0.7 mA Typical
for IP
Supply Voltage of 2.7 to 5.5 V
Dual Modulus Prescaler With Selectable Divide Ratios of 32/33 or 64/65
On–Chip Reference Oscillator/Buffer
Programmable Reference Divider Consisting of a Binary 14–Bit
Programmable Reference Counter
Programmable Divider Consisting of a Binary 7–Bit Swallow Counter
and an 11–Bit Programmable Counter
Phase/Frequency Detector With Phase Conversion Function
Balanced Charge Pump Outputs
Dual Internal Charge Pumps for Bypassing the First Stage of the Loop
Filter to Decrease Lock Time
Outputs for External Charge Pump
Operating Temperature Range of –40 to 85°C
Space Efficient Plastic Surface Mount SOIC or TSSOP Packages
MOSAIC V, Mfax and
InterActiveApNote are trademarks of Motorola, Inc.
MAXIMUM RATINGS (Note 1)
Parameter
Symbol
Value
Unit
Power Supply Voltage, Pin 4 (Pin 5 in
20–lead package)
VCC
–0.5 to 6.0
Vdc
Power Supply Voltage, Pin 3 (Pin 4 in
20–lead package)
Vp
VCC to 6.0
Vdc
Storage Temperature Range
Tstg
–65 to 150
°C
NOTES: 1. Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation should be restricted to the Recommended
Operating Conditions.
2. ESD data available upon request.
© Motorola, Inc. 1997
Rev 4


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