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LC4032V-5T44I Folha de dados(PDF) 1 Page - Lattice Semiconductor

Nome de Peças LC4032V-5T44I
Descrição Electrónicos  3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
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Fabricante Electrônico  LATTICE [Lattice Semiconductor]
Página de início  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

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ispm4k_15z
ispMACH 4000V/B/C/Z Family
3.3V/2.5V/1.8V In-System Programmable
SuperFAST High Density PLDs
July 2003
Data Sheet
TM
TM
© 2003 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
NEW!
Industry’s Lo
west
Power CPLDs!
ispMACH 4000
Z
Features
■ High Performance
•fMAX = 400MHz maximum operating frequency
•tPD = 2.5ns propagation delay
• Up to four global clock pins with programmable
clock polarity control
• Up to 80 PTs per output
■ Ease of Design
• Enhanced macrocells with individual clock,
reset, preset and clock enable controls
• Up to four global OE controls
• Individual local OE control per I/O pin
• Excellent First-Time-Fit
TM and refit
•Fast path, SpeedLocking
TM Path, and wide-PT
path
• Wide input gating (36 input logic blocks) for fast
counters, state machines and address decoders
■ Zero Power (ispMACH 4000Z) and Low
Power (ispMACH 4000V/B/C)
•Typical static current 10µA (4032Z)
•Typical static current 1.8mA (4000C)
• 1.8V core low dynamic power
■ Broad Device Offering
• Multiple temperature range support
– Commercial: 0 to 90°C junction (Tj)
– Industrial: -40 to 105°C junction (Tj)
– Automotive: -40 to 130°C junction (Tj)
■ Easy System Integration
• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
• Operation with 3.3V (4000V), 2.5V (4000B) or
1.8V (4000C/Z) supplies
• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI
interfaces
• Hot-socketing
• Open-drain capability
• Input pull-up, pull-down or bus-keeper
• Programmable output slew rate
• 3.3V PCI compatible
• IEEE 1149.1 boundary scan testable
• 3.3V/2.5V/1.8V In-System Programmable
(ISP™) using IEEE 1532 compliant interface
• I/O pins with fast setup path
Table 1. ispMACH 4000V/B/C Family Selection Guide
Note: ispMACH 4032Z information is preliminary. ispMACH 4064Z/4128Z information is advance.
ispMACH
4032V/B/C
ispMACH
4064V/B/C
ispMACH
4128V/B/C
ispMACH
4256V/B/C
ispMACH
4384V/B/C
ispMACH
4512V/B/C
Macrocells
32
64
128
256
384
512
User I/O Options
30/32
30/32/64
64/92/96
64/96/128/160
128/192
128/208
tPD (ns)
2.5
2.5
2.7
3.0
3.5
3.5
tS (ns)
1.8
1.8
1.8
2.0
2.0
2.0
tCO (ns)
2.2
2.2
2.7
2.7
2.7
2.7
fMAX (MHz)
400
400
333
322
322
322
Supply Voltages (V)
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
Pins/Package
44 TQFP
48 TQFP
44 TQFP
48 TQFP
100 TQFP
100 TQFP
128 TQFP
144 TQFP
1
100 TQFP
144 TQFP
1
176 TQFP
256 fpBGA
2
176 TQFP
256 fpBGA
176 TQFP
256 fpBGA
1. 3.3V (4000V) only.
2. 128-I/O and 160-I/O configurations.


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