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TPA0212PWP Folha de dados(PDF) 3 Page - Texas Instruments

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Nome de Peças TPA0212PWP
Descrição Electrónicos  STEREO 2.6-W AUDIO POWER AMPLIFIER WITH FOUR SELECTABLE GAIN SETTINGS AND MUX CONTROL
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
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TPA0212PWP Folha de dados(HTML) 3 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
TPA0212
SLOS284B – NOVEMBER 1999 – REVISED NOVEMBER 2004
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
BYPASS
11
Tap to voltage divider for internal mid-supply bias generator
GAIN0
2
I
Bit 0 of gain control
GAIN1
3
I
Bit 1 of gain control
1, 12,
GND
Ground connection for circuitry. Connected to the thermal pad.
13, 24
LHPIN
6
I
Left-channel headphone input, selected when SE/BTL is held high
LIN
10
I
Common left input for fully differential input. AC ground for single-ended inputs.
LLINEIN
5
I
Left-channel line input, selected when SE/BTL is held low
LOUT+
4
O
Left-channel positive output in BTL mode and positive output in SE mode
LOUT-
9
O
Left-channel negative output in BTL mode and high-impedance in SE mode
The input for PC-Beep mode. PC-BEEP is enabled when a > 1.5-V (peak-to-peak) square wave is
PC-BEEP
14
I
input to PC-BEEP.
HP/LINE is the input MUX control input. When the HP/LINE terminal is held high, the headphone inputs
HP/LINE
17
I
(LHPIN or RHPIN [6, 20]) are active. When the HP/LINE terminal is held low, the line inputs (LLINEIN
or RLINEIN [5, 23]) are active.
PVDD
7, 18
I
Power supply for output stage
RHPIN
20
I
Right-channel headphone input, selected when SE/BTL is held high
RIN
8
I
Common right input for fully differential input. AC ground for single-ended inputs.
RLINEIN
23
I
Right-channel line input, selected when SE/BTL is held low
ROUT+
21
O
Right-channel positive output in BTL mode and positive output in SE mode
ROUT-
16
O
Right-channel negative output in BTL mode and high-impedance in SE mode
SHUTDOWN
22
I
Places entire IC in shutdown mode when held low, except PC-BEEP remains active
SE/BTL
15
I
Hold SE/BTL low for BTL mode and hold high for SE mode.
Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest
VDD
19
I
performance.
Connect to ground. Must be soldered down in all applications to properly secure the device on the PC
ThermalPAD
board.
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
VDD
Supply voltage
6 V
VI
Input voltage
-0.3 V to VDD +0.3 V
Continuous total power dissipation
Internally limited
(see Dissipation Rating Table)
TA
Operating free-air temperature range
-40
°C to 85°C
TJ
Operating junction temperature range,
-40
°C to 150°C
Tstg
Storage temperature range
-65
°C to 85°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
3


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