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MC10E197 Folha de dados(PDF) 6 Page - ON Semiconductor |
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MC10E197 Folha de dados(HTML) 6 Page - ON Semiconductor |
6 / 16 page MC10E197 http://onsemi.com 6 Phase-Lock Loop Theory Introduction Phase lock loop (PLL) circuits are fundamentally feedback systems used to synchronize the frequency of an oscillator to an incoming signal. In addition to frequency synchronization, the PLL circuitry is designed to minimize the phase difference between the system input and output signals. A block diagram of a feedback control system is shown in Figure 1. where: A(s) is the product of the feed-forward transfer functions. Figure 1. Feedback System Xi(s) Xo(s) A(s) β(s) + − Xe(s) R β(s) is the product of the feedback transfer functions. The transfer function for this closed loop system is Xo(s) Xi(s) = A(s) 1 + A(s)β(s) Typically, phase lock loops are modeled as feedback systems connected in a unity feedback configuration (β(s)=1) with a phase detector, a VCO (voltage controlled oscillator), and a loop filter in the feed-forward path, A(s). Figure 2 illustrates a phase lock loop as a feedback control system in block diagram form. LOOP FILTER F(s) Fi Fo PHASE DETECTOR Kf VCO Ko s Figure 2. Phase Lock Loop Block Diagram The closed loop transfer function is: Xo(s) Xi(s) = Kφ Ko s F(s) Ko s 1 + Kφ F(s) where: Kφ= the phase detector gain. Ko= the VCO gain. Since the VCO introduces a pole at the origin of the s-plane, Ko is divided by s. F(s) = the transfer function of the loop filter. The 10E197 is designed to implement the phase detector and VCO functions in a unity feedback loop, while allowing the user to select the desired filter function. Gain Constants As mentioned, each of the three sections in the phase lock loop block diagram has an associated open loop gain constant. Further, the gain constant of the filter circuitry is composed of the product of three gain constants, one for each filter subsection. The open loop gain constant of the feed-forward path is given by Kol = Kφ * Ko * K1 * Kl * Kd eqt. 1 and obtained by performing a root locus analysis. Phase Detector Gain Constant The gain of the phase detector is a function of the operating mode and the data pattern. The 10E197 provides data separation for signals encoded in 2:7 or 1:7 RLL encoding schemes; hence, Tables 1 and 2 are coding tables for these schemes. Table 3 lists nominal phase detector gains for both 2:7 and 1:7 sync fields. NRZ Data Sequence Code Sequence 00 1000 01 0100 100 001000 101 100100 111 000100 1100 00001000 1101 00100100 Table 1. 2:7 RLL Encoding Table NRZ Data Sequence Code Sequence 00 X01 01 010 10 X00 1100 010001 1101 X00000 1110 X00001 1111 010000 An X in the leading bit of a code sequence is assigned the complement of the bit Table 2. 1:7 RLL Encoding Table Sync Pattern Read Mode Idle Mode 2:7 121 mV/radian 484 mV/radian 1:7 161 mV/radian 483 mV/radian Table 3. Phase Detector Gain Constants VCO Gain Constant The gain of the VCO is a function of the tuning capacitor. For a value of 10 pF a nominal value of the gain, Ko, is 20 MHz per volt. |
Nº de peça semelhante - MC10E197_06 |
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Descrição semelhante - MC10E197_06 |
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