NCP1203D60R2 datasheet(9/15 Pages) ONSEMI

Nome de Peças	NCP1203D60R2

Descrição Electrónicos	PWM Current?묺ode Controller for Universal Off?묹ine Supplies Featuring Standby and Short Circuit Protection

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Fabricante Electrônico	ONSEMI [ON Semiconductor]

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NCP1203

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Figure 15. Typical Waveforms in Short Circuit Conditions

7.8 V

12.8 V

4.9 V

VCC

DRIVING PULSES

Calculating the VCC Capacitor

The VCC capacitor can be calculated knowing the IC

consumption as soon as VCC reaches 12.8 V. Suppose that a

NCP1203P60 is used and drives a MOSFET with a 30 nC

total gate charge (Qg). The total average current is thus made

of ICC1 (700

mA) plus the driver current, Fsw x Qg or

1.8 mA. The total current is therefore 2.5 mA. The

DV

available to fully startup the circuit (e.g. never reach the

7.8 V UVLO during power on) is 12.8–7.8 = 5 V. We have

a capacitor who then needs to supply the NCP1203 with

2.5 mA during a given time until the auxiliary supply takes

over. Suppose that this time was measured at around 15 ms.

CVCC is calculated using the equation C + D

t· i

DV

or

C

w 7.5 mF. Select a 22

mF/16 V and this will fit.

Skipping Cycle Mode

The NCP1203 automatically skips switching cycles when

the output power demand drops below a given level. This is

accomplished by monitoring the FB pin. In normal

operation, pin 2 imposes a peak current accordingly to the

load value. If the load demand decreases, the internal loop

asks for less peak current. When this setpoint reaches a

determined level (Vpin 1), the IC prevents the current from

decreasing further down and starts to blank the output

pulses: the IC enters the so−called skip cycle mode, also

named controlled burst operation. The power transfer now

depends upon the width of the pulse bunches (Figure 17).

Suppose we have the following component values:

Lp, primary inductance = 350

mH

Fsw , switching frequency = 61 kHz

Ip skip = 600 mA (or 333 mV/Rsense)

The theoretical power transfer is therefore:

1

2

·Lp· Ip2 ·Fsw

+ 3.8 W

If this IC enters skip cycle mode with a bunch length of

10 ms over a recurrent period of 100 ms, then the total power

transfer is: 3.8 . 0.1

+ 380 mW.

To better understand how this skip cycle mode takes place,

a look at the operation mode versus the FB level

immediately gives the necessary insight:

Figure 16.

SKIP CYCLE OPERATION

IP(min) = 333 mV/RSENSE

NORMAL CURRENT

MODE OPERATION

FB

1 V

4.2 V, FB Pin Open

3.2 V, Upper

Dynamic Range

When FB is above the skip cycle threshold (1.0 V by

default), the peak current cannot exceed 1.0 V/Rsense.

When the IC enters the skip cycle mode, the peak current

cannot go below Vpin1/3.3/Rsense. The user still has the

flexibility to alter this 1.0 V by either shunting pin 1 to

ground through a resistor or raising it through a resistor up

to the desired level. Grounding pin 1 permanently

invalidates the skip cycle operation. However, given the

extremely low standby power the controller can reach, the

PWM in no−load conditions can quickly enter the minimum

ton and still transfer too much power. An instability can take

place. We recommend in that case to leave a little bit of skip

level to always allow 0% duty cycle.

Nº de peça semelhante - NCP1203D60R2

Fabricante Electrônico	Nome de Peças	Folha de dados	Descrição Electrónicos
ON Semiconductor	NCP1203D60R2	145Kb / 14P	PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Standby and Short Circuit October, 2004??Rev. 4
	NCP1203D60R2G	145Kb / 14P	PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Standby and Short Circuit October, 2004??Rev. 4
	NCP1203D60R2G	257Kb / 15P	PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Standby and Short Circuit Protection April, 2015 ??Rev. 12

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