SN54ABT8952, SN74ABT8952

SCAN TEST DEVICES WITH

OCTAL REGISTERED BUS TRANSCEIVERS

SCBS121D – AUGUST 1992 – REVISED JULY 1996

2

POST OFFICE BOX 655303

description (continued)

Data flow in each direction is controlled by clock (CLKAB and CLKBA), clock-enable (CLKENAB and

CLKENBA), and output-enable (OEAB and OEBA) inputs. For A-to-B data flow, A-bus data is stored in the

associated registers on the low-to-high transition of CLKAB, provided that CLKENAB is low. Otherwise, if

CLKENAB is high or CLKAB remains at a static low or high level, the register contents are not changed. When

OEAB is low, the B outputs are active. When OEAB is high, the B outputs are in the high-impedance state.

Control for B-to-A data flow is similar to that for A-to-B, but uses CLKBA, CLKENBA, and OEBA.

In the test mode, the normal operation of the SCOPE

™ registered bus transceivers is inhibited, and the test

circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry

performs boundary-scan test operations as described in IEEE Standard 1149.1-1990.

Four dedicated test pins control the operation of the test circuitry: test data input (TDI), test data output (TDO),

test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions

such as parallel signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from

data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN54ABT8952 is characterized for operation over the full military temperature range of –55

°C to 125°C.

The SN74ABT8952 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE†

(normal mode, each register)

INPUTS

OUTPUT

OEAB

CLKENAB

CLKAB

A

B

L

L

↑

L

L

L

L

↑

HH

L

HX

X

B0

L

XL

X

B0

H

X

X

X

Z

† A-to-B data flow is shown; B-to-A data flow is similar

but uses OEBA, CLKENBA, and CLKBA.