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SN74VMEH22501AGQLR Folha de dados(PDF) 10 Page - Texas Instruments |
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SN74VMEH22501AGQLR Folha de dados(HTML) 10 Page - Texas Instruments |
10 / 30 page SN74VMEH22501A 8BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3STATE OUTPUTS SCES620 – DECEMBER 2004 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended operating conditions for UBT transceiver (unless otherwise noted) (see Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX UNIT fmax 120 MHz tPLH 3A 3B 5.1 9.3 ns tPHL 3A 3B 4.7 8.3 ns tPLH LE 3B 5.5 10.6 ns tPHL LE 3B 4.9 8.7 ns tPLH CLKAB 3B 5.8 10.1 ns tPHL CLKAB 3B 4.2 8.4 ns tPZH OE 3B 4.2 9.3 ns tPZL OE 3B 3.2 8.5 ns tPHZ OE 3B 4.2 9.3 ns tPLZ OE 3B 2.4 5.7 ns tr Transition time, B port (10%−90%) 4.3 ns tf Transition time, B port (90%−10%) 4.3 ns tPLH 3B 3A 1.5 5.9 ns tPHL 3B 3A 1.7 5.9 ns tPLH LE 3A 1.7 5.9 ns tPHL LE 3A 1.7 5.9 ns tPLH CLKBA 3A 1.1 5.5 ns tPHL CLKBA 3A 1.4 5.5 ns tPZH OE 3A 1.5 6.2 ns tPZL OE 3A 2.1 5.5 ns tPHZ OE 3A 0.8 6.2 ns tPLZ OE 3A 2.3 5.6 ns skew characteristics for bus transceiver for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX UNIT tsk(LH) 1A or 2A 1B or 2B 0.8 ns tsk(HL) 1A or 2A 1B or 2B 0.7 ns tsk(LH) 1B or 2B 1Y or 2Y 0.7 ns tsk(HL) 1B or 2B 1Y or 2Y 0.7 ns tsk(t)† 1A or 2A 1B or 2B 3.9 ns tsk(t)† 1B or 2B 1Y or 2Y 1.5 ns tsk(pp) 1A or 2A 1B or 2B 3.6 ns tsk(pp) 1B or 2B 1Y or 2Y 1.4 ns † tsk(t) − Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)]. |
Nº de peça semelhante - SN74VMEH22501AGQLR |
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Descrição semelhante - SN74VMEH22501AGQLR |
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