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STAC9752AXTAEYYX Folha de dados(PDF) 5 Page - Integrated Device Technology |
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STAC9752AXTAEYYX Folha de dados(HTML) 5 Page - Integrated Device Technology |
5 / 106 page STAC9752A/9753A AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK PC AUDIO IDT™ 5 STAC9752A/9753A V 1.5 1206 AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK LIST OF TABLES Table 1. Clock mode configuration ................................................................................................................ 17 Table 2. Common Clocks and Sources ......................................................................................................... 18 Table 3. Recommended CODEC ID strapping .............................................................................................. 27 Table 4. AC-Link Output Slots (transmitted from the Controller) ................................................................... 31 Table 5. The AC-Link Input Slots (transmitted from the CODEC) .................................................................32 Table 6. VRA Behavior .................................................................................................................................. 33 Table 7. Output Slot 0 Bit Definitions ............................................................................................................. 36 Table 8. Command Address Port Bit Assignments ........................................................................................ 37 Table 9. Status Address Port Bit Assignments .............................................................................................. 40 Table 10. Status Data Port Bit Assignments .................................................................................................. 41 Table 11. Primary CODEC Addressing: Slot 0 Tag Bits ................................................................................ 42 Table 12. Secondary CODEC Addressing: Slot 0 tag bits ............................................................................. 43 Table 13. AC-Link Output Slots Dedicated To CODEC ................................................................................. 43 Table 14. AC-Link Output Slots Dedicated To Audio ..................................................................................... 44 Table 15. AC-Link Input Slots Dedicated To Audio ....................................................................................... 44 Table 16. Audio Interrupt Slot Definitions ...................................................................................................... 45 Table 17. Digital PC Beep Examples ............................................................................................................. 49 Table 18. Programming Registers ................................................................................................................. 50 Table 19. Extended Audio ID Register Functions .......................................................................................... 64 Table 20. AMAP compliant ............................................................................................................................ 66 Table 21. Hardware Supported Sample Rates .............................................................................................. 67 Table 22. Supported Jack and Mic Sense Functions .................................................................................... 75 Table 23. Reg 68h Default Values ................................................................................................................. 77 Table 24. Gain or Attenuation Examples ....................................................................................................... 77 Table 25. Register 68h/Page 01h Bit Overview ............................................................................................. 77 Table 26. Sensed Bits (Outputs) ................................................................................................................... 79 Table 27. Sensed Bits (Inputs) ...................................................................................................................... 79 Table 28. Low Power Modes ......................................................................................................................... 85 Table 29. CODEC ID Selection .....................................................................................................................87 Table 30. Secondary CODEC Register Access Slot 0 Bit Definitions ...........................................................88 Table 31. Test Mode Activation .....................................................................................................................89 Table 32. ATE Test Mode Operation ............................................................................................................. 89 Table 33. STAC9752A/9753A 48 Pin LQFP Pin List ..................................................................................... 91 Table 34. STAC9752A/9753A 32 Pad QFN Pin List ...................................................................................... 93 Table 35. STAC9752A/9753A Digital Connection Signals ............................................................................ 93 Table 36. STAC9752A/9753A Analog Connection Signals ........................................................................... 94 Table 37. STAC9752A/9753A Filtering and Voltage References .................................................................. 95 Table 38. STAC9752A/9753A Power and Ground Signals ........................................................................... 96 Table 39. STAC9752A/9753A No Connects .................................................................................................. 96 |
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