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74LVQ174T Folha de dados(PDF) 5 Page - STMicroelectronics |
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74LVQ174T Folha de dados(HTML) 5 Page - STMicroelectronics |
5 / 10 page AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr =tf =3 ns) Symb ol Parameter T est Con ditio n Valu e Un it VCC (V) TA =25 oC -40 to 85 oC Min. T yp. Max. Mi n. Max. tPLH tPHL Propagation Delay Time CK to Q 2.7 7.0 15.0 17.0 ns 3.3 (*) 5.5 11.0 12.0 tPHL Propagation Delay Time CLR to Q 2.7 8.5 16.0 18.0 ns 3.3 (*) 7.0 12.0 13.0 tw(L) CLR pulse Width, LOW 2.7 1.0 7.0 10.0 ns 3.3 (*) 1.0 5.5 7.0 tw CK pulse Width, HIGH or LOW, 2.7 1.0 7.0 10.0 ns 3.3 (*) 1.0 5.5 7.0 tsL tsH Setup Time D to CK HIGH or LOW 2.7 -0.5 8.0 10.0 ns 3.3 (*) -0.4 6.5 7.0 thL thH Hold Time D to CK HIGH or LOW 2.7 0.5 4.0 4.5 ns 3.3 (*) 0.4 3.0 3.0 tREM Recovery Time CLR to CK 2.7 0.5 3.5 3.5 ns 3.3 (*) 0.4 2.5 2.5 fMAX Maximum Clock Frequency 2.7 60 150 50 MHz 3.3 (*) 90 150 70 tOSLH tOSHL Output to Output Skew Time (note 1, 2) 2.7 0.5 1.0 1.5 ns 3.3 (*) 0.5 1.0 1.5 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH =|tPLHm -tPLHn|, tOSHL =|tPHLm -tpHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditi ons Valu e Un it VCC (V) TA =25 oC -40 to 85 oC Min. T yp. Max. Mi n. Max. CIN Input Capacitance 3.3 5 pF CPD Power Dissipation Capacitance (note 1) 3.3 fIN = 10 MHz 23 pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN +ICC/6(per flipflop) 74LVQ174 5/10 |
Nº de peça semelhante - 74LVQ174T |
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Descrição semelhante - 74LVQ174T |
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