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LG128642-BMDWH6V
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5.1 Display On/Off
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
1
1
1
1
1
D
The display data appears when D is 1 and disappears when D is 0.
Though the data is not on the screen with D=0, it remains in the display data RAM.
Therefore, you can make it appear by changing D=0 into D=1.
5.2 Set Address (Y Address)
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
1
AC5
AC4
AC3
AC2
AC1
AC0
Y address (AC0~AC5) of the display data RAM is set in the Y address counter.
An address is set by instruction and increased by 1 automatically by read or write
operations of display data.
5.3 Set Page (X Address)
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
1
0
1
1
1
AC2
AC1
AC0
X address (AC0-AC2) of the display data RAM is set in the X address register.
Writing or reading to or from MPU is executed in this specified page until the next page is
set.
5.4 Display Start Line (Z Address)
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
1
1
AC5
AC4
AC3
AC2
AC1
AC0
Z address (AC0~AC5) of the display data RAM is set in the display start line register and
displayed at the top of the screen.