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SN74ABT18504PM Folha de dados(PDF) 11 Page - Texas Instruments |
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SN74ABT18504PM Folha de dados(HTML) 11 Page - Texas Instruments |
11 / 34 page SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 data register description (continued) The boundary-control register order of scan is from TDI through bits 22 – 0 to TDO. Table 2 shows the boundary-control register bits and their associated test control signals. Table 2. Boundary Control Register Configuration BCR BIT NUMBER TEST CONTROL SIGNAL BCR BIT NUMBER TEST CONTROL SIGNAL BCR BIT NUMBER TEST CONTROL SIGNAL 22 MASK20 12 MASK10 2 OPCODE2 21 MASK19 11 MASK9 1 OPCODE1 20 MASK18 10 MASK8 0 OPCODE0 19 MASK17 9 MASK7 –– –– 18 MASK16 8 MASK6 –– –– 17 MASK15 7 MASK5 –– –– 16 MASK14 6 MASK4 –– –– 15 MASK13 5 MASK3 –– –– 14 MASK12 4 MASK2 –– –– 13 MASK11 3 MASK1 –– –– bypass register The bypass register is a one-bit scan path that can be selected to shorten the length of the system scan path, thereby reducing the number of bits per test pattern that must be applied to complete a test operation. During Capture-DR, the bypass register captures a logic 0. The bypass register order of scan is illustrated in Figure 3. Bit 0 TDO TDI Figure 3. Bypass Register Order of Scan device identification register The device identification register (IDR) is 32 bits long. It can be selected and read to identify the manufacturer, part number, and version of this device. During Capture-DR, the binary value 00000000000000000111000000101111 (0000702F, hex) is captured in the device identification register to identify this device as Texas Instruments SN54/74ABT18504, version 0. The device identification register order of scan is from TDO through bits 31–0 to TDO. Table 3 shows the device identification register bits and their significance. |
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