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ST6252BM3 Folha de dados(PDF) 4 Page - STMicroelectronics |
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4 / 68 page 4/68 ST62T52B ST62T62B/E62B 1 GENERAL DESCRIPTION 1.1 INTRODUCTION The ST62T52B and ST62T62B devices is low cost members of the ST62xx 8-bit HCMOS family of microcontrollers, which is targeted at low to medi- um complexity applications. All ST62xx devices are based on a building block approach: a com- mon core is surrounded by a number of on-chip peripherals. The ST62E62B is the erasable EPROM version of the ST62T62B device, which may be used to em- ulate the ST62T52B and ST62T62B devices as well as the ST6252B and ST6262B ROM devices. OTP and EPROM devices are functionally identi- cal. The ROM based versions offer the same func- tionality selecting as ROM options the options de- fined in the programmable option byte of the OTP/EPROM versions. OTP devices offer all the advantages of user pro- grammability at low cost, which make them the ideal choice in a wide range of applications where frequent code changes, multiple code versions or last minute programmability are required. These compact low-cost devices feature a Timer comprising an 8-bit counter and a 7-bit program- mable prescaler, an 8-bit Auto-Reload Timer, EEPROM data capability (except ST62T52B), an 8-bit A/D Converter with 4 analog inputs and a Digital Watchdog timer, making them well suited for a wide range of automotive, appliance and in- dustrial applications. Figure 1. Block Diagram TEST NMI INTERRUPT PROGRAM PC STACK LEVEL 1 STACK LEVEL 2 STACK LEVEL 3 STACK LEVEL 4 STACK LEVEL 5 STACK LEVEL 6 POWER SUPPLY OSCILLATOR RESET DATA ROM USER SELECTABLE DATA RAM PORT A PORT B TIMER DIGITAL 8 BIT CORE TEST/VPP 8-BIT A/D CONVERTER PA4..PA5 / Ain PB0, PB2..PB3 / 20 mA Sink VDD VSS OSCin OSCout RESET WATCHDOG MEMORY PB6 / ARTimin / 20 mA Sink PORT C PC2..PC3 / Ain AUTORELOAD TIMER PB7 / ARTimout / 20 mA Sink 128 Bytes 1836 bytes OTP (ST62T52B, T62B) 1836 bytes EPROM (ST62E62B) DATA EEPROM 64 Bytes (ST62T62B/E62B) 4 |
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