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TPA2050D4 Folha de dados(PDF) 3 Page - Texas Instruments |
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TPA2050D4 Folha de dados(HTML) 3 Page - Texas Instruments |
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3 / 29 page  FUNCTIONAL BLOCK DIAGRAM + – + – OUTR– OUTR+ Mode Control HPLEFT HPRIGHT Charge Pump 1 µF 1 µF CPP CPN VSS VDDHP PGND VDDHP VSS VDDHP VSS VDD PGND OUTL– OUTL+ VDD PGND 4-Level Gain Select –60dBto +12dB Volume Control Headphone Power Limiter BiasControl andPop Suppression 1 µF VDD 1 µF VREF LIN– LIN+ RIN– RIN+ 0.47 µF 0.47 µF 0.47 µF 0.47 µF SDA I 2 CInterface SCL DVDD RESET PWM H- Bridge Oscillator PWM H- Bridge BiasControl andPop Suppression 1 µF OUTR– OUTR+ Mode Control HPLEFT HPRIGHT SDA I 2 CInterface SCL Charge Pump 1 µF 1 µF CPP CPN VSS VDDHP PGND VDD PGND OUTL– OUTL+ VDD PGND VDD 4-Level Gain Select –60 dBto +12 dB VolumeControl –60 dBto +12 dB VolumeControl RIN1 LIN1 RIN2 LIN2 0.47 µF 0.47 µF 0.47 µF 0.47 µF Headphone Power Limiter VDDHP VSS VDDHP VSS 1 µF VREF DVDD RESET PWM H- Bridge Oscillator PWM H- Bridge TPA2050D4 www.ti.com....................................................................................................................................................................................................... SLOS544 – JULY 2008 Figure 1. Differential Input Mode Figure 2. Single-Ended (SE) Input Mode Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPA2050D4 |
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