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SM65MLVD203D Folha de dados(PDF) 1 Page - Texas Instruments

Nome de Peças SM65MLVD203D
Descrição Electrónicos  MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
Download  26 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

SM65MLVD203D Folha de dados(HTML) 1 Page - Texas Instruments

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1
FEATURES
APPLICATIONS
DESCRIPTION
4
3
1
2
DE
D
RE
R
6
7
A
B
LOGIC DIAGRAM (POSITIVE LOGIC)
5
4
2
3
DE
D
RE
R
12
11
A
B
10
9
Y
Z
SN65MLVD203, SN65MLVD207
SN65MLVD201, SN65MLVD206
SN65MLVD201, SN65MLVD203
SN65MLVD206, SN65MLVD207
SLLS558C – DECEMBER 2002 – REVISED JANUARY 2007
www.ti.com
MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
• Low-Power High-Speed Short-Reach
• Low-Voltage Differential 30-Ω to 55-Ω Line
Alternative to TIA/EIA-485
Drivers and Receivers for Signaling Rates(1)
• Backplane or Cabled Multipoint Data and
Up to 200 Mbps
Clock Transmission
• Type-1 Receivers Incorporate 25 mV of
• Cellular Base Stations
Hysteresis
• Central-Office Switches
• Type-2 Receivers Provide an Offset (100 mV)
• Network Switches and Routers
Threshold to Detect Open-Circuit and Idle-Bus
Conditions
• Meets or Exceeds the M-LVDS Standard
TIA/EIA-899 for Multipoint Data Interchange
The
SN65MLVD201,
203,
206,
and
207
are
multipoint-low-voltage
differential
(M-LVDS)
line
• Controlled Driver Output Voltage Transition
drivers and receivers, which are optimized to operate
Times for Improved Signal Quality
at signaling rates up to 200 Mbps. All parts comply
• -1 V to 3.4 V Common-Mode Voltage Range
with the multipoint low-voltage differential signaling
Allows Data Transfer With 2 V of Ground Noise
(M-LVDS) standard TIA/EIA-899. These circuits are
similar to their TIA/EIA-644 standard compliant LVDS
• Bus Pins High Impedance When Disabled or
counterparts,
with
added
features
to
address
VCC ≤ 1.5 V
multipoint applications. The driver output has been
• 100-Mbps Devices Available (SN65MLVD200A,
designed to support multipoint buses presenting
202A, 204A, 205A)
loads as low as 30
Ω, and incorporates controlled
• M-LVDS Bus Power Up/Down Glitch Free
transition times to allow for stubs off of the backbone
transmission line.
The signaling rate of a line, is the number of voltage transitions
that are made per second expressed in the units bps (bits per
These devices have Type-1 and Type-2 receivers
second).
that detect the bus state with as little as 50 mV of
differential
input
voltage
over
a
common-mode
voltage range of -1 V to 3.4 V. The Type-1 receivers
exhibit 25 mV of differential input voltage hysteresis
to prevent output oscillations with slowly changing
signals or loss of input. Type-2 receivers include an
offset threshold to provide a known output state
under
open-circuit,
idle-bus,
and
other
faults
conditions.
The
devices
are
characterized
for
operation from –40
°C to 85°C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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