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TL1454YPW Folha de dados(PDF) 4 Page - Texas Instruments

Nome de Peças TL1454YPW
Descrição Electrónicos  DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM) CONTROL CIRCUIT
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TL1454, TL1454Y
DUAL-CHANNEL PULSE-WIDTH-MODULATION (PWM)
CONTROL CIRCUIT
SLVS086B – APRIL 1995 – REVISED NOVEMBER 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
theory of operation
reference voltage
A linear regulator operating from VCC generates a 2.5-V supply for the internal circuits and the 1.25-V reference,
which can source a maximum of 1 mA for external loads. A small ceramic capacitor (0.047
µF to 0.1 µF) between
REF and ground is recommended to minimize noise pickup.
error amplifier
The error amplifier generates the error signal used by the PWM to adjust the power-switch duty cycle for the
desired converter output voltage. The signal is generated by comparing a sample of the output voltage to the
voltage reference and amplifying the difference. An external resistive divider connected between the converter
output and ground, as shown in Figure 1, is generally required to obtain the output voltage sample.
The amplifier output is brought out on COMP to allow the frequency response of the amplifier to be shaped with
an external RC network to stabilize the feedback loop of the converter. DC loading on the COMP output is limited
to 45
µA (the maximum amplifier source current capability).
Figure 1 illustrates the sense-divider network and error-amplifier connections for converters with positive output
voltages. The divider network is connected to the noninverting amplifier input because the PWM has a phase
inversion; the duty cycle decreases as the error-amplifier output increases.
_
+
IN –
IN +
R3
R1
R2
COMP
To PWM
VO
Compensation
Network
REF
Converter
Output
TL1454
Figure 1. Sense Divider/Error Amplifier
Configuration for Converters with Positive Outputs
The output voltage is given by:
V
O +
V
ref
1
) R1
R2
where Vref = 1.25 V.
The dc source resistance of the error-amplifier inputs should be 10 k
Ω or less and approximately matched to
minimize output voltage errors caused by the input-bias current. A simple procedure for determining appropriate
values for the resistors is to choose a convenient value for R3 (10 k
Ω or less) and calculate R1 and R2 using:
R
1 +
R
3
V
O
V
O
–V
ref
R
2 +
R
3
V
O
V
ref


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