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TP13067BN Folha de dados(PDF) 1 Page - Texas Instruments |
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TP13067BN Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 21 page TP3064B, TP3067B, TP13064B, TP13067B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SCTS031D – MAY 1990 –REVISED JULY 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Complete PCM Codec and Filtering Systems Include: – Transmit High-Pass and Low-Pass Filtering – Receive Low-Pass Filter With (sin x)/x Correction – Active RC Noise Filters – µ-Law or A-Law Compatible Coder and Decoder – Internal Precision Voltage Reference – Serial I/O Interface – Internal Autozero Circuitry D µ-Law – TP13064B and TP3064B D A-Law – TP13067B and TP3067B D ±5-V Operation D Low Operating Power...70 mW Typ D Power-Down Standby Mode...3mW Typ D Automatic Power Down D TTL- or CMOS-Compatible Digital Interface D Maximizes Line Interface Card Circuit Density D Improved Versions of National Semiconductor TP3064, TP3067, TP3064-X, and TP3067-X description The TP3064B, TP3067B, TP13064B, and TP13067B each comprise a single-chip pulse- code-modulation encoder and decoder (PCM codec), and PCM line filter. They also provide band-pass filtering of the analog signals prior to the encoding, and low-pass filtering after the decoding of voice signals and call-progress tones. All the functions required to interface a full-duplex (2-wire) voice telephone circuit with a time-divi- sion-multiplexed (TDM) system are included on-chip. These devices are pin-for-pin compatible with the National Semiconductor TP3064 and TP3067. Primary applications include: • Line interface for digital transmission and switching of T1 carrier, PABX (private automated branch exchange), and central office telephone systems • Subscriber line concentrators • Digital-encryption systems • Digital voice-band data-storage systems • Digital signal processing These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A conversion) as well as the transmit and receive filtering functions in a PCM system, and are intended to be used at the analog termination of a PCM line or trunk. They require a transmit master clock and a receive master clock that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that are synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive frame-sync pulses. The TP3064B and TP13064B contain patented circuitry to achieve low transmit channel idle noise and are not recommended for applications in which the composite signals on the transmit side are below – 55 dBm0. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the CMOS gates. Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VPO+ ANLG GND VPO – VPI VFRO VCC FSR DR BCLKR/CLKSEL MCLKR/PDN VBB VFXI+ VFXI – GSX ANLG LOOP TSX FSX DX BCLKX MCLKX DW OR N PACKAGE (TOP VIEW) |
Nº de peça semelhante - TP13067BN |
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Descrição semelhante - TP13067BN |
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