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SI-3033KS Folha de dados(PDF) 2 Page - Allegro MicroSystems

Nome de Peças SI-3033KS
Descrição Electrónicos  Surface-Mount, Low Current Consumption, Low Dropout Voltage Linear Regulator ICs
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Fabricante Electrônico  ALLEGRO [Allegro MicroSystems]
Página de início  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

SI-3033KS Folha de dados(HTML) 2 Page - Allegro MicroSystems

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15
ICs
SI-3000KS Series
■External Dimensions (SOP8)
(Unit : mm)
0.995max.
0.10
1.27
0.4±0.1
0.4±0.1
0.15+0.1
5.1±0.4
1.27
8765
1234
–0.05
0.12 M
Pin Assignment
q VC
w VIN
e VO
r Sence (ADJ for SI-3012KS)
t GND
y GND
u GND
i GND
Plastic Mold Package Type
Flammability: UL 94V-0
Product Mass: Approx. 0.1 g
■Block Diagram
■Typical Connection Diagram
●SI-3012KS
●SI-3025KS, SI-3033KS
●SI-3012KS
●SI-3025KS, SI-3033KS
R1, R2: Output voltage setting resistors
The output voltage can be set by connecting R1 and R2
as shown above.
The recommended value of R2 is 24 k
Ω .
R1=(VO–VADJ)
÷(VADJ/R2)
2
VIN
1
REF
VC
VOUT
ADJ
GND
4
8
7
6
5
3
TSD
-
+
2
VIN
1
REF
VC
VOUT
Sense
GND
4
8
7
6
5
3
TSD
-
+
GND
5 to 8
VIN
CIN
R1
R2
2
VO
CO
3
VC
1
ADJ
4
+
Load
GND
5 to 8
VIN
CIN
R2
2
VO
CO
3
VC
1
sense
4
Load
CIN: Input capacitor (22
µF or larger)
CO: Output capacitor (22
µF or larger)
For SI-3000KS series, Co has to be a low ESR capacitor.
When using the electrolytic capacitor, the SI-3000KS series may oscillate at a low temperature.
■Reference Data
Copper Laminate Area vs.
Thermal Resistance
Copper Laminate Area vs.
Power Dissipation
• Obtaining the junction temperature
Measure the temperature TL at the lead part of the GND
pin (pin 7) with a thermocouple, etc. Then, substitute
this value in the following formula to obtain the junction
temperature.
Tj=PD
× θj–L + TL
(
θj–L = 22°C/W)
Copper laminate area (mm2)
(GND terminal)
10
100
140
120
100
80
60
40
1000
Area of PC board : 40
×40mm
10
100
1.2
1
0.8
0.6
0.4
0.2
0
1000
Tj=100
°C Area of PC board : 40×40mm
Ta=25
°C
Ta=50
°C
Ta=80
°C
Copper laminate area (mm2)
(GND terminal)


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