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74AHCT2G00DP Folha de dados(PDF) 6 Page - NXP Semiconductors |
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74AHCT2G00DP Folha de dados(HTML) 6 Page - NXP Semiconductors |
6 / 14 page 74AHC_AHCT2G00_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 12 January 2009 6 of 14 NXP Semiconductors 74AHC2G00; 74AHCT2G00 Dual 2-input NAND gate 11. Dynamic characteristics [1] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure 7. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74AHC2G00 tpd propagation delay nA, nB to nY; see Figure 6 [1] VCC = 3.0 V to 3.6 V [2] CL = 15 pF - 4.5 7.9 1.0 9.5 1.0 10.5 ns CL = 50 pF - 6.5 11.4 1.0 13.0 1.0 14.5 ns VCC = 4.5 V to 5.5 V [3] CL = 15 pF - 3.5 5.5 1.0 6.5 1.0 7.0 ns CL = 50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns CPD power dissipation capacitance per buffer; CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4] -17- - - - - pF 74AHCT2G00 tpd propagation delay nA, nB to nY; see Figure 6 [1] VCC = 4.5 V to 5.5 V [3] CL = 15 pF 1.0 3.6 6.2 1.0 7.1 1.0 8.0 ns CL = 50 pF 1.0 5.0 7.9 1.0 9.0 1.0 10.0 ns CPD power dissipation capacitance per buffer; CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4] -18- - - - - pF |
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