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CS1500 Folha de dados(PDF) 8 Page - Cirrus Logic |
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CS1500 Folha de dados(HTML) 8 Page - Cirrus Logic |
8 / 22 page CS1500 8 DS849A5 May ?$shortyear> CONFIDENTIAL 3.1 PFC Operating Frequency One key feature of the CS1500 is its operating frequency profile. Figure 10 illustrates how the frequency varies over half cycle of the line voltage in steady-state operation. When power is first applied to the CS1500, it first examines the line voltage and adapts its operating frequency to the exposed line voltage as shown in Figure 11. The operating frequency is varied in about a 2-to-1 ratio from the peak to the trough. During start-up the control algorithm limits the maximum on- time, provides nearly square-wave envelop current within every half line cycle by adjusting the operating frequency for fast startup behavior. Figure 10. Switching Frequency vs. Phase Angle Figure 11. Switching Frequency vs. Output Power Figure 11 illustrates how the operating frequency (as a percentage of maximum frequency) changes with output power and the peak of the line voltage. Burst mode (when Po below 5%) will be discussed in a later section. The CS1500 is designed to function as a DCM (discontinuous conduction mode) controller, however it may operate in a quasi-CRM operation mode near the peak periods. For 90~265VAC main input applications, PFC can be also designed in quasi-CRM at a peak of 90VAC and full load as shown in Figure 12. Figure 12. DCM and quasi-CRM Operation with CS1500 3.2 Start-up vs. Normal Operation Mode CS1500 has two discrete operation modes: Start-up and Normal. Start-up mode will be activated when Vlink is less than 90% of nominal value and remains active until Vlink reaches 100% of nominal value, as shown in Figure 13. Startup mode is activated during initial system power-up. Any Vlink drop to less than 90% of nominal value, such as load change, can cause the system to enter Start-up Mode until Vlink is brought back into regulation. Figure 13. Start-up and Normal Modes 3.3 Burst Mode Burst mode is utilized to improve system efficiency when the system output power (Po) is < 5% of nominal. Burst mode is implemented by intermittently disabling the PFC over a full half-line period cycle under light load conditions, as shown in Figure 14. 0 20 40 60 80 100 120 045 90 135 180 Rectified Line Voltage Phase (Deg.) Switching Freq. (% of Max.) Line Voltage (% of Max.) % PO max Vin < 150 VAC 20 70 50 60 40 40 5 20 0 60 80 100 Vin > 150 VAC 46 56 DCM Quasi CRM DCM Quasi CRM DCM ILB t [ms] IAC t [ms] Vlink [V] 100% 90% Normal Mode Normal Mode |
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Descrição semelhante - CS1500 |
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