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BU2092F Folha de dados(PDF) 8 Page - Rohm |
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BU2092F Folha de dados(HTML) 8 Page - Rohm |
8 / 12 page 8 Standard ICs BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV •Circuit operation The logic of the DATA pin is sent to the 12-bit shift register on the rising edge of the CLOCK pulse. Subsequently, it is shifted from Q0 to Q11 for every clock rising edge. For the BU2090 / F / FS When the DATA pin is LOW on the CLOCK falling edge, the data does not change its output state. It is only shifted in the internal shift register. However, when the DATA pin is HIGH, the content of the 12-bit shift register is latched and is output to the corresponding Q0 to Q11. D11 D10 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 CLOCK DATA Note 1) indicates unstable output. Note 2) Pull-up resistance is connected to the output pin. Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Fig.3 Operation timing chart |
Nº de peça semelhante - BU2092F |
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Descrição semelhante - BU2092F |
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