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KM4132G271AQ-10 Folha de dados(PDF) 4 Page - Samsung semiconductor

Nome de Peças KM4132G271AQ-10
Descrição Electrónicos  128K x 32Bit x 2 Banks Synchronous Graphic RAM
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Fabricante Electrônico  SAMSUNG [Samsung semiconductor]
Página de início  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

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KM4132G271A
CMOS SGRAM
Rev.0 (August 1997)
DECOUPLING CAPACITANCE GUIDE LINE
Recommended decoupling capacitance added to power line at board.
Parameter
Symbol
Value
Unit
Decoupling Capacitance between VDD and VSS
CDC1
0.1 + 0.01
uF
Decoupling Capacitance between VDDQ and VSSQ
CDC2
0.1 + 0.01
uF
1. VDD and VDDQ pins are separated each other.
All VDD pins are connected in chip. All VDDQ pins are connected in chip.
2. VSS and VSSQ pins are separated each other
All VSS pins are connected in chip. All VSSQ pins are connected in chip.
Note :
ABSOLUTE MAXIMUM RATINGS(Voltage referenced to VSS)
Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VDD supply relative to Vss
VDD, VDDQ
-1.0 ~ 4.6
V
Storage temperature
TSTG
-55 ~ +150
¡É
Power dissipation
PD
1
W
Short circuit current
IOS
50
mA
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to VSS = 0V)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
VDD, VDDQ
3.0
3.3
3.6
V
Input high voltage
VIH
2.0
3.0
VDD+0.3
V
Input low voltage
VIL
-0.3
0
0.8
V
Note 1
Output high voltage
VOH
2.4
-
-
V
IOH = -2mA
Output low voltage
VOL
-
-
0.4
V
IOL = 2mA
Input leakage current
IIL
-5
-
5
§Ë
Note 2
Output leakage current
IOL
-5
-
5
§Ë
Note 3
Output Loading Condition
see figure 1
1. VIL (min) = -1.5V AC(pulse width ¡Â 5ns).
2. Any input 0V ¡Â VIN ¡Â VDD + 0.3V, all other pins are not under test = 0V.
3. Dout is disabled, 0V¡Â VOUT ¡Â VDD.
Note :
CAPACITANCE (VDD/VDDQ = 3.3V, TA = 25¡É, f = 1MHz)
Parameter
Symbol
Min
Max
Unit
Input capacitance (A0 ~ A9)
CIN1
-
4
pF
Input capacitance
(CLK, CKE, CS, RAS, CAS, WE, DSF & DQM)
CIN2
-
4
pF
Data input/output capacitance (DQ0 ~ DQ31)
COUT
-
5
pF


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