−120

−100

−80

−60

−40

−20

0

f − Frequency − Hz

20

100

1k

10k

20k

G016

Gain = 20 dB

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0

5

10

15

20

25

30

G015

Gain = 20 dB

TPA3112D1

SLOS654B – SEPTEMBER 2009 – REVISED AUGUST 2010

www.ti.com

TYPICAL CHARACTERISTICS (continued)

(All Measurements taken at 1 kHz, unless otherwise noted. Measurements were made using the TPA3112D2 EVM which is

available at ti.com.)

SUPPLY CURRENT

SUPPLY RIPPLE REJECTION RATIO

vs

vs

TOTAL OUTPUT POWER

FREQUENCY

Figure 14.

Figure 15.

DEVICE INFORMATION

Gain setting via GAIN0 and GAIN1 inputs

The gain of the TPA3112D1 is set by two input terminals, GAIN0 and GAIN1. The voltage slew rate of these gain

terminals, along with terminals 1 and 14, must be restricted to no more than 10V/ms. For higher slew rates, use

a 100k

Ω resistor in series with the terminals.

The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This

ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance from part-to-part

at the same gain may shift by ±20% due to shifts in the actual resistance of the input resistors.

For design purposes, the input network (discussed in the next section) should be designed assuming an input

impedance of 7.2 k

Ω, which is the absolute minimum input impedance of the TPA3112D1. At the lower gain

settings, the input impedance could increase as high as 72 k

Ω

Table 1. Gain Setting

INPUT IMPEDANCE

AMPLIFIER GAIN (dB)

(k

Ω)

GAIN1

GAIN0

TYP

TYP

0

0

20

60

0

1

26

30

1

0

32

15

1

1

36

9

10

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